Attention is currently required from: Alexander Couzens, Maciej Pijanowski, Michał Kopeć, Nicholas Sudsgaard, Paul Menzel.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80609?usp=email )
Change subject: mb/lenovo: Add ThinkCentre M920q (Cannon Lake) ......................................................................
Patch Set 4:
(9 comments)
File src/mainboard/lenovo/m920q/Kconfig:
https://review.coreboot.org/c/coreboot/+/80609/comment/8331ac54_a6fc5fcf : PS4, Line 30: hex Avoid type redefinitions, remove.
https://review.coreboot.org/c/coreboot/+/80609/comment/81e9b561_7be79026 : PS4, Line 33: config DIMM_SPD_SIZE : default 512 #DDR4 Remove, that's the default for Cannon Lake based SoCs.
File src/mainboard/lenovo/m920q/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80609/comment/150b7841_8790c84e : PS4, Line 9: # PL2 override 65W Seems superfluous.
https://review.coreboot.org/c/coreboot/+/80609/comment/e2808bbc_ee81423b : PS4, Line 16: device ref system_agent on end Remove, enabled by default.
https://review.coreboot.org/c/coreboot/+/80609/comment/38f94491_46fd6334 : PS4, Line 52: # SATA Remove superfluous comment.
https://review.coreboot.org/c/coreboot/+/80609/comment/e9585313_3569af8d : PS4, Line 56: [1] = 0, : [2] = 0, : [3] = 0, : [4] = 0, : [5] = 0, : [6] = 0, : [7] = 0, Remove, they are disabled.
So just use: ``` register "SataPortsEnable[0]" = "1" ```
https://review.coreboot.org/c/coreboot/+/80609/comment/62168448_4a7166d8 : PS4, Line 117: # eSPI controller Remove superfluous comment.
https://review.coreboot.org/c/coreboot/+/80609/comment/789f6147_6d2eccb2 : PS4, Line 118: device ref p2sb on end : Remove, they are hidden by the FSP and marked as hidden in chipset devicetree.
https://review.coreboot.org/c/coreboot/+/80609/comment/7d56343d_19443f9c : PS4, Line 121: register "PchHdaDspEnable" = "0" Remove, set to 0.