[coreboot-gerrit] Change in coreboot[master]: [TEST] mb/asus/p5ql_pro: Re-add second southbridge to dt

[Nico Huber (Code Review)]

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39926 )

Change subject: [TEST] mb/asus/p5ql_pro: Re-add second southbridge to dt
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[TEST] mb/asus/p5ql_pro: Re-add second southbridge to dt

This was lost during review.

Change-Id: I1f4ca20d67830dcf75b924d99474ac1613c36bd9
Signed-off-by: Nico Huber 
---
M src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/39926/1

diff --git a/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb b/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb
index 633ca81..4b65e82 100644
--- a/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb
+++ b/src/mainboard/asus/p5qc/variants/p5ql_pro/devicetree.cb
@@ -33,6 +33,8 @@
    	device pci 3.3 off end		# ME
    	device pci 6.0 off end		# PEG 2
    	chip southbridge/intel/i82801jx	# Southbridge
+
+		chip southbridge/intel/i82801jx	# Southbridge
    		register "gpe0_en" = "0x40"

register "sata_port_map" = "0x3f"