[coreboot-gerrit] [XL] Change in coreboot[main]: vc/intel/fsp/fsp2_0/snowridge: Add FSP headers for Snow Ridge SoC

[Shuo Liu (Code Review)]

Attention is currently required from: Jérémy Compostella, Paul Menzel, [e-mail].

Shuo Liu has posted comments on this change by [e-mail]. ( https://review.coreboot.org/c/coreboot/+/83192?usp=email )

Change subject: vc/intel/fsp/fsp2_0/snowridge: Add FSP headers for Snow Ridge SoC
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Patch Set 6:

(1 comment)

Patchset:

PS3:
> I don't have the specific FSP commit version because I used the one in the binaries release. […]

By checking /w Yuchi, the provided headers are the latest updated version and able to support passing build. IMO, this could be acceptable as a baseline for the new SoC/CRB enabling. Hence I will close my open here. Please feel free to discuss with Yuchi if you have other opens.