[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform

[John Zhao (Code Review)]

John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43657 )

Change subject: soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43657/4/src/soc/intel/tigerlake/rom... 
File src/soc/intel/tigerlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/43657/4/src/soc/intel/tigerlake/rom... 
PS4, Line 200: m_cfg->TcssDma0En || m_cfg->TcssDma1En
> > TcssDma0 is grouped with Pcie root ports 0/1 and TcssDma1 together with Pcie 2/3.  […]

TcssDmaX is actually referred to as USB4/Thunderbolt controller. Their acpi device names are associated as TcssDma0->TDM0 and TcssDma1->TDM1. Please ignore the name confusion.