Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13760
-gerrit
commit 9b4cdc2f0bc37930779488227f2880109db1156d Author: Vladimir Serbinenko phcoder@gmail.com Date: Sun Feb 21 15:02:35 2016 +0100
Make coreboot supply DTB
On platforms other than i386 it's often very cumbersome to know where different devices are located. As coreboot already has to know really a lot about devices, it's easier if we would maintain DT here as well and then payloads can use this.
Change-Id: I352ee291ac64dada0759c89438195bd207b860ae Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/Kconfig | 6 ++++++ src/commonlib/include/commonlib/coreboot_tables.h | 2 ++ src/lib/Makefile.inc | 12 ++++++++++++ src/lib/coreboot_table.c | 18 ++++++++++++++++++ 4 files changed, 38 insertions(+)
diff --git a/src/Kconfig b/src/Kconfig index 4cceb14..b486566 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -608,6 +608,12 @@ config HAVE_ACPI_TABLES This variable specifies whether a given board has ACPI table support. It is usually set in mainboard/*/Kconfig.
+config DTS_FILE + string + default "" + help + This variable specifies source file for DTB. + config HAVE_MP_TABLE bool help diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h index 5c28791..6cf22440 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h @@ -346,6 +346,8 @@ struct lb_tsc_info { #define LB_TAG_SERIALNO 0x002a #define MAX_SERIALNO_LENGTH 32
+#define LB_TAG_DEVICE_TREE 0x0033 + /* The following structures are for the cmos definitions table */ #define LB_TAG_CMOS_OPTION_TABLE 200 /* cmos header record */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 7d1d146..d66011a 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -215,3 +215,15 @@ $(objcbfs)/%.debug.rmod: $(objcbfs)/%.debug | $(RMODTOOL)
$(obj)/%.elf.rmod: $(obj)/%.elf | $(RMODTOOL) $(RMODTOOL) -i $< -o $@ + +ifneq ($(CONFIG_DTS_FILE),"") + +cbfs-files-y += $(call strip_quotes,$(CONFIG_CBFS_PREFIX))/fdt.dtb +$(CONFIG_CBFS_PREFIX)/fdt.dtb-file = $(obj)/fdt.dtb +$(CONFIG_CBFS_PREFIX)/fdt.dtb-type = raw +$(CONFIG_CBFS_PREFIX)/fdt.dtb-compression = none +-include $(obj)/fdt.d +$(obj)/fdt.dtb: $(src)/mainboard/$(MAINBOARDDIR)/$(call strip_quotes,$(CONFIG_DTS_FILE)) + @printf " DTB $(call strip_quotes,$(CONFIG_DTS_FILE))\n" + dtc -I dts -O dtb -o $@ $< -d $(obj)/fdt.d +endif diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 0cfb8ac..d7972d6 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -387,6 +387,22 @@ static void lb_record_version_timestamp(struct lb_header *header) rec->timestamp = coreboot_version_timestamp; }
+static void lb_device_tree(struct lb_header *header) +{ + void *dtb_file; + struct lb_string *rec; + size_t dtb_size; + dtb_file = cbfs_boot_map_with_leak( + CONFIG_CBFS_PREFIX "/fdt.dtb", + CBFS_TYPE_RAW, &dtb_size); + if (!dtb_file) + return; + rec = (struct lb_string *)lb_new_record(header); + rec->tag = LB_TAG_DEVICE_TREE; + rec->size = (sizeof(*rec) + dtb_size + 3) & ~3; + memcpy(rec->string, dtb_file, dtb_size); +} + void __attribute__((weak)) lb_board(struct lb_header *header) { /* NOOP */ }
static struct lb_forward *lb_forward(struct lb_header *header, struct lb_header *next_header) @@ -524,6 +540,8 @@ unsigned long write_coreboot_table( /* Add RAM config if available */ lb_ram_code(head);
+ lb_device_tree(head); + #if IS_ENABLED(CONFIG_SPI_FLASH) /* Add SPI flash description if available */ lb_spi_flash(head);