[coreboot-gerrit] Change in coreboot[master]: cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize step

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44884 )

Change subject: cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize step
......................................................................

cpu/intel/haswell: Set LT_LOCK_MEMORY MSR on finalize step

This is a security lock and is required for TXT, among other things.

Tested on Asrock B85M Pro4, still boots.

Change-Id: I7b2e8a60ce92cbf523c520be0b365f28413b9624
Signed-off-by: Angel Pons 
---
M src/cpu/intel/haswell/finalize.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/44884/1

diff --git a/src/cpu/intel/haswell/finalize.c b/src/cpu/intel/haswell/finalize.c
index 1f84b82..1832e63 100644
--- a/src/cpu/intel/haswell/finalize.c
+++ b/src/cpu/intel/haswell/finalize.c
@@ -6,4 +6,6 @@

void intel_cpu_haswell_finalize_smm(void)
 {
+	/* Lock memory configuration to protect SMM */
+	msr_set_bit(MSR_LT_LOCK_MEMORY, 0);
 }