[coreboot-gerrit] Change in coreboot[master]: mb/intel/adlrvp: Fix sagv point3 clipping to 4800Mhz

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58373 )

Change subject: mb/intel/adlrvp: Fix sagv point3 clipping to 4800Mhz
......................................................................

mb/intel/adlrvp: Fix sagv point3 clipping to 4800Mhz

Update board type to 4 as per MRC team's input. This
fixes LP5 sagv point 3 being clipped from the expected
5200Mhz to 4800Mhz.

TEST=Boot to OS, verify frequency locked.

Signed-off-by: Bora Guvendik 
Change-Id: I9472aec41537425c1ed648b949f484939ee9ff99
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58373
Tested-by: build bot (Jenkins) 
Reviewed-by: Selma Bensaid 
Reviewed-by: Tim Wawrzynczak 
---
M src/mainboard/intel/adlrvp/memory.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved
  Selma Bensaid: Looks good to me, but someone else must approve

diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index 93f1aa3a2..f4ae541 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -227,7 +227,7 @@

.LpDdrDqDqsReTraining = 1,

-	.UserBd = BOARD_TYPE_ULT_ULX,
+	.UserBd = BOARD_TYPE_ULT_ULX_T4,
 };

static const struct mb_cfg adlm_lp5_mem_config = {
@@ -283,7 +283,7 @@

.ect = false, /* Early Command Training */

-	.UserBd = BOARD_TYPE_ULT_ULX,
+	.UserBd = BOARD_TYPE_ULT_ULX_T4,

.lp5x_config = {
    	.ccc_config = 0xff,