[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Add pcie root complex driver

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34424 )

Change subject: soc/amd/picasso: Add pcie root complex driver
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Patch Set 35:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34424/31/src/soc/amd/picasso/northb... 
File src/soc/amd/picasso/northbridge.c:

https://review.coreboot.org/c/coreboot/+/34424/31/src/soc/amd/picasso/northb... 
PS31, Line 41: for (; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = fsp_next_hob(hob)) {
> I agree. I filed b/156946266 to understand what the 12MB before TOM is. […]

My guess is that 12MiB might be CC6 for saving core state, though I don't think the cpu can directly address that part of the physical address space.