Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33512 )
Change subject: soc/intel/cannonlake: fix use of legacy 8254 timer ......................................................................
Patch Set 6:
(2 comments)
https://review.coreboot.org/#/c/33512/1/src/soc/intel/cannonlake/fsp_params.... File src/soc/intel/cannonlake/fsp_params.c:
https://review.coreboot.org/#/c/33512/1/src/soc/intel/cannonlake/fsp_params.... PS1, Line 249: params->Enable8254ClockGatingOnS3 = CONFIG_USE_LEGACY_8254_TIMER;
Sorry, I should have been more specific. I think we should set […]
given that it defaults to 1/enabled in FSP, is there a need to explicitly set it?
https://review.coreboot.org/#/c/33512/1/src/soc/intel/cannonlake/lpc.c File src/soc/intel/cannonlake/lpc.c:
https://review.coreboot.org/#/c/33512/1/src/soc/intel/cannonlake/lpc.c@214 PS1, Line 214: clock_gate_8254
This should be removed from `chip.h` too.
Ack