Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83815?usp=email )
(
3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/amd/*: pass PSP RPMC NVRAM base and size to amdfwtool ......................................................................
soc/amd/*: pass PSP RPMC NVRAM base and size to amdfwtool
Pass the PSP NVRAM base and size to amdfwtool for all SoCs except Genoa and Stoneyridge which don't use/support this.
If a mainboard has an section named 'PSP_RPMC_NVRAM' in its FMAP file, the start and length of it in the flash will be passed to amdfwtool which then adds the base and length to the corresponding type 0x54 PSP directory table entry.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Id9f8a7eec68a5222be63e46173132f1c4a461b4f Reviewed-on: https://review.coreboot.org/c/coreboot/+/83815 Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Matt DeVillier matt.devillier@amd.corp-partner.google.com --- M src/soc/amd/cezanne/Makefile.mk M src/soc/amd/glinda/Makefile.mk M src/soc/amd/mendocino/Makefile.mk M src/soc/amd/phoenix/Makefile.mk M src/soc/amd/picasso/Makefile.mk 5 files changed, 51 insertions(+), 0 deletions(-)
Approvals: Matt DeVillier: Looks good to me, approved Marshall Dawson: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/amd/cezanne/Makefile.mk b/src/soc/amd/cezanne/Makefile.mk index 75abb9d..adbf3a6 100644 --- a/src/soc/amd/cezanne/Makefile.mk +++ b/src/soc/amd/cezanne/Makefile.mk @@ -95,6 +95,11 @@ PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) endif
+# type = 0x54 +# The flashmap section used for this is expected to be named PSP_RPMC_NVRAM +PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START) +PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE) + # type = 0x55 SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE)
@@ -149,6 +154,9 @@ OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
+OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base) +OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size) + OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
@@ -177,6 +185,8 @@ AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_PSP_NVRAM_BASE) \ $(OPT_PSP_NVRAM_SIZE) \ + $(OPT_PSP_RPMC_NVRAM_BASE) \ + $(OPT_PSP_RPMC_NVRAM_SIZE) \ $(OPT_APOB_ADDR) \ $(OPT_DEBUG_AMDFWTOOL) \ $(OPT_PSP_BIOSBIN_FILE) \ diff --git a/src/soc/amd/glinda/Makefile.mk b/src/soc/amd/glinda/Makefile.mk index 14b6ecc..7f48581 100644 --- a/src/soc/amd/glinda/Makefile.mk +++ b/src/soc/amd/glinda/Makefile.mk @@ -95,6 +95,11 @@ PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) endif
+# type = 0x54 +# The flashmap section used for this is expected to be named PSP_RPMC_NVRAM +PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START) +PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE) + # type = 0x55 SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE) ifeq ($(CONFIG_HAVE_SPL_RW_AB_FILE),y) @@ -165,6 +170,9 @@ OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
+OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base) +OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size) + OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
@@ -202,6 +210,8 @@ AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_PSP_NVRAM_BASE) \ $(OPT_PSP_NVRAM_SIZE) \ + $(OPT_PSP_RPMC_NVRAM_BASE) \ + $(OPT_PSP_RPMC_NVRAM_SIZE) \ $(OPT_APOB_ADDR) \ $(OPT_DEBUG_AMDFWTOOL) \ $(OPT_PSP_BIOSBIN_FILE) \ diff --git a/src/soc/amd/mendocino/Makefile.mk b/src/soc/amd/mendocino/Makefile.mk index 70bb59c..4236894 100644 --- a/src/soc/amd/mendocino/Makefile.mk +++ b/src/soc/amd/mendocino/Makefile.mk @@ -98,6 +98,11 @@ PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) endif
+# type = 0x54 +# The flashmap section used for this is expected to be named PSP_RPMC_NVRAM +PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START) +PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE) + # type = 0x55 SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE) ifeq ($(CONFIG_HAVE_SPL_RW_AB_FILE),y) @@ -180,6 +185,9 @@ OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
+OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base) +OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size) + OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
@@ -223,6 +231,8 @@ AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_PSP_NVRAM_BASE) \ $(OPT_PSP_NVRAM_SIZE) \ + $(OPT_PSP_RPMC_NVRAM_BASE) \ + $(OPT_PSP_RPMC_NVRAM_SIZE) \ $(OPT_APOB_ADDR) \ $(OPT_DEBUG_AMDFWTOOL) \ $(OPT_PSP_BIOSBIN_FILE) \ diff --git a/src/soc/amd/phoenix/Makefile.mk b/src/soc/amd/phoenix/Makefile.mk index 84d52bf..7713fad 100644 --- a/src/soc/amd/phoenix/Makefile.mk +++ b/src/soc/amd/phoenix/Makefile.mk @@ -105,6 +105,11 @@ PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) endif
+# type = 0x54 +# The flashmap section used for this is expected to be named PSP_RPMC_NVRAM +PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START) +PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE) + # type = 0x55 SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE) ifeq ($(CONFIG_HAVE_SPL_RW_AB_FILE),y) @@ -189,6 +194,9 @@ OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
+OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base) +OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size) + OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
@@ -233,6 +241,8 @@ AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_PSP_NVRAM_BASE) \ $(OPT_PSP_NVRAM_SIZE) \ + $(OPT_PSP_RPMC_NVRAM_BASE) \ + $(OPT_PSP_RPMC_NVRAM_SIZE) \ $(OPT_APOB_ADDR) \ $(OPT_DEBUG_AMDFWTOOL) \ $(OPT_PSP_BIOSBIN_FILE) \ diff --git a/src/soc/amd/picasso/Makefile.mk b/src/soc/amd/picasso/Makefile.mk index 7545bb2..7ba975f0 100644 --- a/src/soc/amd/picasso/Makefile.mk +++ b/src/soc/amd/picasso/Makefile.mk @@ -92,6 +92,12 @@ ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) endif + +# type = 0x54 +# The flashmap section used for this is expected to be named PSP_RPMC_NVRAM +PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START) +PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE) + # # BIOS Directory Table items - proper ordering is managed by amdfwtool # @@ -150,6 +156,9 @@ OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
+OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base) +OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size) + OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
@@ -186,6 +195,8 @@ AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_PSP_NVRAM_BASE) \ $(OPT_PSP_NVRAM_SIZE) \ + $(OPT_PSP_RPMC_NVRAM_BASE) \ + $(OPT_PSP_RPMC_NVRAM_SIZE) \ $(OPT_PSP_APCB_FILES_BK) \ $(OPT_APOB_ADDR) \ $(OPT_DEBUG_AMDFWTOOL) \