[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Do write leveling training

[Angel Pons (Code Review)]

Attention is currently required from: Xi Chen, CK HU, Yidi Lin.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44717 )

Change subject: soc/mediatek/mt8192: Do write leveling training
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Patch Set 57:

(3 comments)

File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:

https://review.coreboot.org/c/coreboot/+/44717/comment/f67172c0_bdcdcbf8 
PS57, Line 4220: 0x80
nit: `1 << 7` would be more self-explanatory

https://review.coreboot.org/c/coreboot/+/44717/comment/d637fc05_b0f6b3b7 
PS57, Line 4222: 0x7f
Same as above, this could be `~(1 << 7)`

https://review.coreboot.org/c/coreboot/+/44717/comment/16114e6b_42fddfe4 
PS57, Line 4271: set_dram_mr_write_leveling
Shouldn't this function be called twice? Once to enable WL mode, and once to exit WL mode.