Attention is currently required from: Subrata Banik, Tarun Tuli.
Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76192?usp=email )
Change subject: soc/intel: Add human-readble names to RPL-S ESPI PCI IDs ......................................................................
soc/intel: Add human-readble names to RPL-S ESPI PCI IDs
Change-Id: I68416e1633c3d67070790a9db2cd9a13a8981042 Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/lpc/lpc.c 3 files changed, 9 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/76192/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index fca9b0d..b311991 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2980,9 +2980,9 @@ #define PCI_DID_INTEL_RPP_S_ESPI_1 0x7a01 #define PCI_DID_INTEL_RPP_S_ESPI_2 0x7a02 #define PCI_DID_INTEL_RPP_S_ESPI_3 0x7a03 -#define PCI_DID_INTEL_RPP_S_ESPI_4 0x7a04 -#define PCI_DID_INTEL_RPP_S_ESPI_5 0x7a05 -#define PCI_DID_INTEL_RPP_S_ESPI_6 0x7a06 +#define PCI_DID_INTEL_RPP_S_ESPI_Z790 0x7a04 +#define PCI_DID_INTEL_RPP_S_ESPI_H770 0x7a05 +#define PCI_DID_INTEL_RPP_S_ESPI_B760 0x7a06 #define PCI_DID_INTEL_RPP_S_ESPI_7 0x7a07 #define PCI_DID_INTEL_RPP_S_ESPI_8 0x7a08 #define PCI_DID_INTEL_RPP_S_ESPI_9 0x7a09 diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index de5af21..034cd1c 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -107,9 +107,9 @@ { PCI_DID_INTEL_RPP_S_ESPI_1, "Raptorlake-S SKU" }, { PCI_DID_INTEL_RPP_S_ESPI_2, "Raptorlake-S SKU" }, { PCI_DID_INTEL_RPP_S_ESPI_3, "Raptorlake-S SKU" }, - { PCI_DID_INTEL_RPP_S_ESPI_4, "Raptorlake-S Z790" }, - { PCI_DID_INTEL_RPP_S_ESPI_5, "Raptorlake-S H770" }, - { PCI_DID_INTEL_RPP_S_ESPI_6, "Raptorlake-S B760" }, + { PCI_DID_INTEL_RPP_S_ESPI_Z790, "Raptorlake-S Z790" }, + { PCI_DID_INTEL_RPP_S_ESPI_H770, "Raptorlake-S H770" }, + { PCI_DID_INTEL_RPP_S_ESPI_B760, "Raptorlake-S B760" }, { PCI_DID_INTEL_RPP_S_ESPI_7, "Raptorlake-S SKU" }, { PCI_DID_INTEL_RPP_S_ESPI_8, "Raptorlake-S SKU" }, { PCI_DID_INTEL_RPP_S_ESPI_9, "Raptorlake-S SKU" }, diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 1d8d748..0de3154 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -182,9 +182,9 @@ PCI_DID_INTEL_RPP_S_ESPI_1, PCI_DID_INTEL_RPP_S_ESPI_2, PCI_DID_INTEL_RPP_S_ESPI_3, - PCI_DID_INTEL_RPP_S_ESPI_4, - PCI_DID_INTEL_RPP_S_ESPI_5, - PCI_DID_INTEL_RPP_S_ESPI_6, + PCI_DID_INTEL_RPP_S_ESPI_Z790, + PCI_DID_INTEL_RPP_S_ESPI_H770, + PCI_DID_INTEL_RPP_S_ESPI_B760, PCI_DID_INTEL_RPP_S_ESPI_7, PCI_DID_INTEL_RPP_S_ESPI_8, PCI_DID_INTEL_RPP_S_ESPI_9,