[coreboot-gerrit] [M] Change in coreboot[master]: mb/google/myst: Enable PCIe devices in devicetree

[Jon Murphy (Code Review)]

Attention is currently required from: Raul Rangel, Martin L Roth, Martin Roth, Tim Van Patten, Karthik Ramasubramanian, Felix Held, Mark Hasemeyer.

Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 )

Change subject: mb/google/myst: Enable PCIe devices in devicetree
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Patch Set 41:

(4 comments)

File src/mainboard/google/myst/port_descriptors.c:

https://review.coreboot.org/c/coreboot/+/74112/comment/af67aa88_3df94ca6 
PS40, Line 10: PCIE_ENGINE
> That's correct. Unused lanes take 20-30ms to train. […]

Done

https://review.coreboot.org/c/coreboot/+/74112/comment/698812a1_6c3eb75e 
PS40, Line 41: GPIO_29
> Can be removed. […]

Done

https://review.coreboot.org/c/coreboot/+/74112/comment/6baadedc_bc2c85b6 
PS40, Line 51: GEN3
> i'm still working on the dxio descriptor data structure update; want to do all upd-related changes i […]

I'm not sure if I agree with using GEN_MAX.  Shouldn't we be calling out specifically the link speed capability to what we expect it to be?

https://review.coreboot.org/c/coreboot/+/74112/comment/83210aa2_d96996cc 
PS40, Line 53: GPIO_31
> Same comment as above.

Done