[coreboot-gerrit] Change in coreboot[master]: dram: Add basic DDR4 SPD parsing

[Andrey Petrov (Code Review)]

Hello Arthur Heymans, Matt DeVillier, Christian Walter, David Hendricks, Stefan Reinauer, build bot (Jenkins), Martin Roth, Patrick Georgi,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/34680

to look at the new patch set (#7).

Change subject: dram: Add basic DDR4 SPD parsing
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dram: Add basic DDR4 SPD parsing

Add ability to decode basic fields of DDR4 SPDs and produce SMBIOS table
17. XMP, schemas, extended field parising is totally not yet implemented.
Also, put CRC function used in DDR2, DDR3 and DDR4 ina  common file.

Signed-off-by: Andrey Petrov 
Change-Id: If3befbc55cf37e1018baa432cb2f03743b929211
---
M src/device/dram/Makefile.inc
M src/device/dram/ddr2.c
M src/device/dram/ddr3.c
A src/device/dram/ddr4.c
A src/device/dram/ddr_common.c
M src/include/device/dram/common.h
A src/include/device/dram/ddr4.h
7 files changed, 384 insertions(+), 23 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/34680/7