[coreboot-gerrit] [S] Change in coreboot[master]: sb,soc/intel: Use register_new_ioapic_gsi0()

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55314 )

Change subject: sb,soc/intel: Use register_new_ioapic_gsi0()
......................................................................

sb,soc/intel: Use register_new_ioapic_gsi0()

Change-Id: I6b0e4021595fb160ae3bf798468f4505b460266f
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55314
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/soc/intel/broadwell/pch/lpc.c
M src/soc/intel/common/block/lpc/lpc_lib.c
M src/soc/intel/denverton_ns/lpc.c
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/i82801dx/lpc.c
M src/southbridge/intel/i82801gx/lpc.c
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801jx/lpc.c
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/lynxpoint/lpc.c
10 files changed, 23 insertions(+), 11 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c
index 5a1623f..1ddee34 100644
--- a/src/soc/intel/broadwell/pch/lpc.c
+++ b/src/soc/intel/broadwell/pch/lpc.c
@@ -33,7 +33,7 @@
    /* PCH-LP has 40 redirection entries */
    ioapic_set_max_vectors(VIO_APIC_VADDR, 40);

-	setup_ioapic(VIO_APIC_VADDR, 0x02);
+	register_new_ioapic_gsi0(VIO_APIC_VADDR);
 }

static void enable_hpet(struct device *dev)
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index d499918..c820203 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -387,7 +387,7 @@
    /* affirm full set of redirection table entries ("write once") */
    ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);

-	setup_ioapic((void *)IO_APIC_ADDR, 0x02);
+	register_new_ioapic_gsi0((void *)IO_APIC_ADDR);
 }

static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = {
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 5d1eda5..7ebca1e 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -34,7 +34,7 @@
    /* affirm full set of redirection table entries ("write once") */
    ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);

-	setup_ioapic((void *)IO_APIC_ADDR, IO_APIC0);
+	register_new_ioapic_gsi0((void *)IO_APIC_ADDR);
 }

/* interrupt router lookup for internal devices */
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 4635189..7c10c81 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -44,7 +44,7 @@
    /* affirm full set of redirection table entries ("write once") */
    ioapic_lock_max_vectors(VIO_APIC_VADDR);

-	setup_ioapic(VIO_APIC_VADDR, 0x02);
+	register_new_ioapic_gsi0(VIO_APIC_VADDR);
 }

static void pch_enable_serial_irqs(struct device *dev)
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index 1de3766..1569c1c 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -50,7 +50,7 @@
    pci_write_config32(dev, GEN_CNTL, reg32);
    printk(BIOS_DEBUG, "IOAPIC Southbridge enabled %x\n", reg32);

-	setup_ioapic(VIO_APIC_VADDR, 0x02);
+	register_new_ioapic_gsi0(VIO_APIC_VADDR);

ioapic_set_boot_config(VIO_APIC_VADDR, true);
 }
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 90d4eab..ec0df27 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -33,7 +33,7 @@
  */
 static void i82801gx_enable_ioapic(struct device *dev)
 {
-	setup_ioapic(VIO_APIC_VADDR, 0x02);
+	register_new_ioapic_gsi0(VIO_APIC_VADDR);
 }

static void i82801gx_enable_serial_irqs(struct device *dev)
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 8d44384..24b8a27 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -35,7 +35,7 @@
    /* Lock maximum redirection entries (MRE), R/WO register. */
    ioapic_lock_max_vectors(VIO_APIC_VADDR);

-	setup_ioapic(VIO_APIC_VADDR, 2); /* ICH7 code uses id 2. */
+	register_new_ioapic_gsi0(VIO_APIC_VADDR);
 }

static void i82801ix_enable_serial_irqs(struct device *dev)
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 1297837..7dfc33f 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -36,7 +36,7 @@
    /* Lock maximum redirection entries (MRE), R/WO register. */
    ioapic_lock_max_vectors(VIO_APIC_VADDR);

-	setup_ioapic(VIO_APIC_VADDR, 2); /* ICH7 code uses id 2. */
+	register_new_ioapic_gsi0(VIO_APIC_VADDR);
 }

static void i82801jx_enable_serial_irqs(struct device *dev)
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index d4e3098..f0d0ac9 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -35,7 +35,7 @@
    /* affirm full set of redirection table entries ("write once") */
    ioapic_lock_max_vectors(VIO_APIC_VADDR);

-	setup_ioapic(VIO_APIC_VADDR, 0x01);
+	register_new_ioapic_gsi0(VIO_APIC_VADDR);
 }

static void pch_enable_serial_irqs(struct device *dev)
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 20e40cb..b8e9d5f 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -42,8 +42,7 @@
    else
    	ioapic_lock_max_vectors(VIO_APIC_VADDR);

-	setup_ioapic(VIO_APIC_VADDR, 0x02);
-
+	register_new_ioapic_gsi0(VIO_APIC_VADDR);
 }

static void pch_enable_serial_irqs(struct device *dev)