[coreboot-gerrit] [XS] Change in coreboot[master]: mb/google/myst: Add PCIe shutdown workaround

[Martin L Roth (Code Review)]

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75583?usp=email )

Change subject: mb/google/myst: Add PCIe shutdown workaround
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mb/google/myst: Add PCIe shutdown workaround

On Myst, the FSP is shutting down the PCIe lanes that the SSD is
on.  Enable hotplug to force the FSP to keep the lanes active.

BUG=b:284213391
TEST=Boot to OS

Signed-off-by: Jon Murphy 
Change-Id: Iaf0aca329f05f15a3ce9edfa6a0e782c2edccabe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75583
Tested-by: build bot (Jenkins) 
Reviewed-by: Martin L Roth 
---
M src/mainboard/google/myst/port_descriptors.c
1 file changed, 4 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Martin L Roth: Looks good to me, approved

diff --git a/src/mainboard/google/myst/port_descriptors.c b/src/mainboard/google/myst/port_descriptors.c
index 6d0d0d6..108dd4e 100644
--- a/src/mainboard/google/myst/port_descriptors.c
+++ b/src/mainboard/google/myst/port_descriptors.c
@@ -54,6 +54,8 @@
    .function_number = PCI_FUNC(NVME_DEVFN),
    .link_speed_capability = GEN_MAX,
    .turn_off_unused_lanes = true,
+	/* TODO(b/284213391): Fix PCIe shutdown */
+	.link_hotplug = 3,
    .clk_req = CLK_REQ3,
 };

@@ -66,6 +68,8 @@
    .function_number = PCI_FUNC(NVME_DEVFN),
    .link_speed_capability = GEN_MAX,
    .turn_off_unused_lanes = true,
+	/* TODO(b/284213391): Fix PCIe shutdown */
+	.link_hotplug = 3,
    .clk_req = CLK_REQ3,
 };