[coreboot-gerrit] [S] Change in coreboot[main]: mb/google/nissa/var/riven: Add G2 touchscreen support

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83823?usp=email )

Change subject: mb/google/nissa/var/riven: Add G2 touchscreen support
......................................................................

mb/google/nissa/var/riven: Add G2 touchscreen support

This change adds the necessary configuration for the G2 Touchscreen(GTCH7503) device, connected to I2C bus 40.

It includes settings for:
* HID descriptor
* Device description
* IRQ configuration
* Detection
* Reset and enable GPIOs with their respective delays
* Power resource handling
* HID descriptor register offset

BUG=b:350844195
TEST=emerge-nissa coreboot
     boot with G2 TS, make sure G2 TS is functional.

Change-Id: If17367cd62eb69a1237efe4aa3ca1a0c9640ba4c
Signed-off-by: David Wu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83823
Reviewed-by: Eric Lai 
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/brya/variants/riven/overridetree.cb
1 file changed, 14 insertions(+), 0 deletions(-)

Approvals:
  Subrata Banik: Looks good to me, approved
  Eric Lai: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/google/brya/variants/riven/overridetree.cb b/src/mainboard/google/brya/variants/riven/overridetree.cb
index 301d72a..411277f 100644
--- a/src/mainboard/google/brya/variants/riven/overridetree.cb
+++ b/src/mainboard/google/brya/variants/riven/overridetree.cb
@@ -255,6 +255,20 @@
    			register "hid_desc_reg_offset" = "0x01"
    			device i2c 10 on end
    		end
+			chip drivers/i2c/hid
+				register "generic.hid" = ""GTCH7503""
+				register "generic.desc" = ""G2 Touchscreen""
+				register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
+				register "generic.detect" = "1"
+				register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
+				register "generic.reset_delay_ms" = "120"
+				register "generic.reset_off_delay_ms" = "3"
+				register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
+				register "generic.enable_delay_ms" = "12"
+				register "generic.has_power_resource" = "1"
+				register "hid_desc_reg_offset" = "0x01"
+				device i2c 40 on end
+			end
    		chip drivers/generic/gpio_keys
    			register "name" = ""PENH""
    			register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"