[coreboot-gerrit] Change in coreboot[master]: nb/amd/agesa: define DDR3_SPD_SIZE as a common value

[Mike Banon (Code Review)]

Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44498 )

Change subject: nb/amd/agesa: define DDR3_SPD_SIZE as a common value
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/44498/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/44498/1//COMMIT_MSG@9 
PS1, Line 9: Move a size of DDR3 SPD memory (always 256 bytes) to a common define.
> Um, but replace the other instances of `256` as well?

Sadly it's really not obvious (at least to me) which of these references are guaranteed to stand for SPD size. I replaced only one for which I'm 100% confident, to be on the safe side.