[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: [WIP]Trigger cse_fw_sync before DRAM Init

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Sridhar Siricilla, Tim Wawrzynczak, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55364 )

Change subject: soc/intel/alderlake: [WIP]Trigger cse_fw_sync before DRAM Init
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Patch Set 5: Verified+1

(1 comment)

File src/soc/intel/alderlake/romstage/romstage.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-129970):
https://review.coreboot.org/c/coreboot/+/55364/comment/b8f89048_a4b63b6b 
PS5, Line 140: 	if (!s3wake) {
braces {} are not necessary for single statement blocks