Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62703 )
Change subject: mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage ......................................................................
mb/google/brya/var/primus{4es}: add eMMC enable pin in ramstage
Currently the BayHub eMMC enable pin is using the default configuration from the baseboard, which leads to RTD3 not being able to control the GPIO when exiting and entering suspend. To fix this, program the GPIO in the ramstage GPIO table.
BUG=b:222436260 TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage scope enable pin while performing suspend stress and enable pin works as expected. test suspend stress 1000 cycles passed on primus.
Signed-off-by: Casper Chang casper_chang@wistron.corp-partner.google.com Change-Id: I1b6f164cc326bd368addb1e143ad2cbd449bb08d Reviewed-on: https://review.coreboot.org/c/coreboot/+/62703 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@mailbox.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/brya/variants/primus/gpio.c M src/mainboard/google/brya/variants/primus4es/gpio.c 2 files changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/primus/gpio.c b/src/mainboard/google/brya/variants/primus/gpio.c index d4d6684..c224866 100644 --- a/src/mainboard/google/brya/variants/primus/gpio.c +++ b/src/mainboard/google/brya/variants/primus/gpio.c @@ -49,6 +49,8 @@ PAD_NC(GPP_E3, NONE), /* E7 : PROC_GP1 ==> NC */ PAD_NC(GPP_E7, NONE), + /* E20 : USB_C1_LSX_SOC_TX ==> EN_PP3300_eMMC */ + PAD_CFG_GPO(GPP_E20, 1, DEEP), /* E21 : DDP2_CTRLDATA ==> NC */ PAD_NC(GPP_E21, NONE),
diff --git a/src/mainboard/google/brya/variants/primus4es/gpio.c b/src/mainboard/google/brya/variants/primus4es/gpio.c index d2dadc3..5947b6e 100644 --- a/src/mainboard/google/brya/variants/primus4es/gpio.c +++ b/src/mainboard/google/brya/variants/primus4es/gpio.c @@ -53,6 +53,8 @@ PAD_NC(GPP_E3, NONE), /* E7 : PROC_GP1 ==> NC */ PAD_NC(GPP_E7, NONE), + /* E20 : USB_C1_LSX_SOC_TX ==> EN_PP3300_eMMC */ + PAD_CFG_GPO(GPP_E20, 1, DEEP), /* E21 : DDP2_CTRLDATA ==> NC */ PAD_NC(GPP_E21, NONE),
6 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.