Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38143 )
Change subject: mb/asus/p5qc: Add ASUS P5Q as a variant (with documentation) ......................................................................
Patch Set 18: Code-Review+2
(10 comments)
Silicon Image mystery is solved :)
Only thing to do is update the PCIe port description and change a few minor things.
https://review.coreboot.org/c/coreboot/+/38143/18/Documentation/mainboard/as... File Documentation/mainboard/asus/p5q.md:
https://review.coreboot.org/c/coreboot/+/38143/18/Documentation/mainboard/as... PS18, Line 66: model f4x, f6x, 6fx, 1067x (pentium 4, d, core 2) Nit: use capitals for names
Model f4x, f6x, 1067x (Pentium 4, D, Core 2)
https://review.coreboot.org/c/coreboot/+/38143/1/src/mainboard/asus/p5qc/var... File src/mainboard/asus/p5qc/variants/p5q/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/38143/1/src/mainboard/asus/p5qc/var... PS1, Line 58: device pci 1c.0 on end # PCIe 1 slot 1
Here it is: https://pastebin. […]
I've checked the boardview, and everything makes sense now.
PCIe devices: - Device 1c.0 --> PCIEX1_1 slot - Device 1c.1 --> PCIEX1_2 slot - Device 1c.2 --> (empty) - Device 1c.3 --> (empty) - Device 1c.4 --> Marvell 88SE6121 SATA/IDE controller - Device 1c.5 --> Atheros AR8121 Ethernet NIC
PCI devices: - Device 1e.0 --> 3x PCI slots and LSI FW322 FireWire controller
Aaand the Silicon Image SIL5723 is connected to... Marvell 88SE6121 SATA port 0?
I investigated a bit, and it makes sense now.
The Marvell chip is a PCIe to ATA controller. There are two pin-compatible versions: - 88SE6111: PCIe x1 to 1x IDE and 1x SATA, no RAID - 88SE6111: PCIe x1 to 1x IDE and 2x SATA, supports RAID 0 or 1 on SATA
Note that the Marvell RAID is not "true" RAID, it relies on driver software to do RAID. I guess the Asus mainboard designers wanted real RAID, so they just threw in a SIL5723. The Silicon Image SIL5723 is a port multiplier with hardware support for RAID. It is configured using physical strap pins, and one of the modes allows software control.
On the Asus P5Q, SATA is wired as follows: - The six red SATA ports are directly connected to the ICH10's six SATA ports. - The orange and white SATA ports go to the SIL5723 ports 0 and 1, respectively. - The SIL5723 is connected to the 88SE6121 port 0. - The 88SE6121 port 1 is unconnected.
On the Asus P5Q, the SIL5723 straps are directly wired to ICH10 GPIO pins: - GPIO57 --> CFG0 - GPIO39 --> CFG1 - GPIO23 --> CFG2 - GPIO28 --> RAID mode trigger
Strapping table: https://cdn.mos.cms.futurecdn.net/2GpyCMvfJzbYYsYFarfJ2W-650-80.png Source: https://www.tomshardware.com/reviews/silicon-image-brings-virtualization-esa...
https://review.coreboot.org/c/coreboot/+/38143/1/src/mainboard/asus/p5qc/var... PS1, Line 71: device pnp 2e.0 off end # FDC : device pnp 2e.1 off end # LPT1 : device pnp 2e.2 on # COM1 : # Global registers : irq 0x2a = 0x00 : irq 0x2c = 0x22 : irq 0x2d = 0x00 : io 0x60 = 0x3f8 : irq 0x70 = 4 : end
Tested it w/ your patch, didnt work either
Ack
https://review.coreboot.org/c/coreboot/+/38143/18/src/mainboard/asus/p5qc/va... File src/mainboard/asus/p5qc/variants/p5q/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/38143/18/src/mainboard/asus/p5qc/va... PS18, Line 50: PCIe 1 slot 1 State: on
Comment: PCIe 1: PCIEX1_1 slot
https://review.coreboot.org/c/coreboot/+/38143/18/src/mainboard/asus/p5qc/va... PS18, Line 51: PCIe 2 slot 2 State: on
Comment: PCIe 2: PCIEX1_2 slot
https://review.coreboot.org/c/coreboot/+/38143/18/src/mainboard/asus/p5qc/va... PS18, Line 52: PCIe 3 slot 3 State: off
Comment: PCIe 3: Unconnected
https://review.coreboot.org/c/coreboot/+/38143/18/src/mainboard/asus/p5qc/va... PS18, Line 53: PCIe 4 (Silicon Image?) State: off
Comment: PCIe 4: Unconnected
https://review.coreboot.org/c/coreboot/+/38143/18/src/mainboard/asus/p5qc/va... PS18, Line 54: PCIe 5 MARVELL IDE State: on
Comment: PCIe 5: Marvell 88SE6121 IDE/SATA controller
https://review.coreboot.org/c/coreboot/+/38143/18/src/mainboard/asus/p5qc/va... PS18, Line 55: PCIe 6 ethernet NIC State: on
Comment: PCIe 6: Atheros AR8121 Ethernet NIC
https://review.coreboot.org/c/coreboot/+/38143/18/src/mainboard/asus/p5qc/va... PS18, Line 89: irq 0xe5 = 0x02 #Need to test with 0x82 value You can drop this line entirely. Register 0xe4 is setting all GPIOs as input except for GPIO82. This means that only bit 2 of register 0xe5 is writeable, and it defaults to zero already.