Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44498 )
Change subject: nb/amd/agesa: define DDR3_SPD_SIZE as a common value
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Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44498/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/44498/1//COMMIT_MSG@9
PS1, Line 9: Move a size of DDR3 SPD memory (always 256 bytes) to a common define.
If there's a decent enough AGESA header where you could add this definition, I'd add it in vendorcod […]
Done.
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