HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41009 )
Change subject: soc/intel/broadwell/adsp: Fix 8-bit write on PCI_INTERRUPT_LINE register
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Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41009/2//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/41009/2//COMMIT_MSG@9
PS2, Line 9: The PCI_INTERRUPT_LINE register is one byte wide.
Please mention possible effects of the wrong write. I assume the […]
Done.
Vielen Dank
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