Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41009 )
Change subject: soc/intel/broadwell/adsp: Fix 8-bit write on PCI_INTERRUPT_LINE register ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41009/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41009/2//COMMIT_MSG@9 PS2, Line 9: The PCI_INTERRUPT_LINE register is one byte wide. Please mention possible effects of the wrong write. I assume the other registers that were originally written (accidentally cleared) are all read-only, but we don't know that until somebody tries.
If we don't know and don't want to try, we should at least mention that "Possible side-effects are unknown.".