[coreboot-gerrit] Patch set updated for coreboot: 0a63cfe ASUS F2A85-M: romstage.c: Set RAM voltage for non 1.5 Volt case

[Paul Menzel]

Paul Menzel ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3200

-gerrit

commit 0a63cfe1ff9f81029ee9937023d09a8941150868
Author: Paul Menzel 
Date:   Sun May 5 12:09:16 2013 +0200

ASUS F2A85-M: romstage.c: Set RAM voltage for non 1.5 Volt case

Currently the if statement

if (!byte)
        	do_smbus_write_byte(0xb20, 0x15, 0x3, byte);

only gets executed if `byte == 0x0`, that means only in the
    default case where RAM voltage is 1.5 Volts. But the RAM voltage
    should be changed when configured for the non-default case.

So change the predicament to alter the RAM voltage for the
    non-default cases.

To prevent the build error

OBJCOPY    cbfs/fallback/coreboot_ram.elf
        coreboot-builds/asus_f2a85-m/generated/crt0.romstage.o: In function `cache_as_ram_main':
        /srv/jenkins/.jenkins/jobs/coreboot-gerrit/workspace/src/mainboard/asus/f2a85-m/romstage.c:106: undefined reference to `do_smbus_write_byte'
        collect2: error: ld returned 1 exit status
        make: *** [coreboot-builds/asus_f2a85-m/cbfs/fallback/romstage_null.debug] Error 1

add `southbridge/amd/agesa/hudson/smbus.c` providing the function
    `do_smbus_write_byte` to ROM stage in `Makefile.inc`.

Change-Id: I89542479c4cf6d412614bcf4586ea98e097328d6
    Reported-by: David Hubbard 
    Signed-off-by: Paul Menzel 
---
 src/mainboard/asus/f2a85-m/romstage.c         | 3 ++-
 src/southbridge/amd/agesa/hudson/Makefile.inc | 1 +
 src/southbridge/amd/agesa/hudson/smbus.c      | 1 +
 src/southbridge/amd/agesa/hudson/smbus.h      | 2 +-
 4 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index c2fc75e..a8c8ba0 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -101,7 +101,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    	/* set DDR3 voltage */
    	byte = CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_VAL;

-		if (!byte)
+		/* default is byte = 0x0, so no need to set it in this case */
+		if (byte)
    		do_smbus_write_byte(0xb20, 0x15, 0x3, byte);
    }

diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc
index da029a0..7802600 100644
--- a/src/southbridge/amd/agesa/hudson/Makefile.inc
+++ b/src/southbridge/amd/agesa/hudson/Makefile.inc
@@ -1,3 +1,4 @@
+romstage-y += smbus.c
 ramstage-y += hudson.c
 ramstage-y += usb.c
 ramstage-y += lpc.c
diff --git a/src/southbridge/amd/agesa/hudson/smbus.c b/src/southbridge/amd/agesa/hudson/smbus.c
index 682b86d..d13032e 100644
--- a/src/southbridge/amd/agesa/hudson/smbus.c
+++ b/src/southbridge/amd/agesa/hudson/smbus.c
@@ -20,6 +20,7 @@
 #ifndef  _HUDSON_SMBUS_C_
 #define  _HUDSON_SMBUS_C_

+#include <stdint.h>
 #include "smbus.h"

static inline void smbus_delay(void)
diff --git a/src/southbridge/amd/agesa/hudson/smbus.h b/src/southbridge/amd/agesa/hudson/smbus.h
index b194aae..53cc0e6 100644
--- a/src/southbridge/amd/agesa/hudson/smbus.h
+++ b/src/southbridge/amd/agesa/hudson/smbus.h
@@ -20,7 +20,7 @@
 #ifndef HUDSON_SMBUS_H
 #define HUDSON_SMBUS_H

-//#include <stdint.h>
+#include <stdint.h>

#define SMBHSTSTAT 0x0
 #define SMBSLVSTAT 0x1