[coreboot-gerrit] [S] Change in coreboot[master]: src/soc/intel/alderlake: add SOC_INTEL_RAPTORLAKE_PCH_S symbol

[Michał Żygowski (Code Review)]

Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76322?usp=email )

(

12 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: src/soc/intel/alderlake: add SOC_INTEL_RAPTORLAKE_PCH_S symbol
......................................................................

src/soc/intel/alderlake: add SOC_INTEL_RAPTORLAKE_PCH_S symbol

Introduce new symbol SOC_INTEL_RAPTORLAKE_PCH_S that can be selected
by board with RPL-S PCH.

For now only the IoT variant of RPL-S FSP is available for use with
700 series chipsets. Boards with 600 series chipsets can still use
RPL CPUs with the ADL-S C.0.75.10, which contains minimal RPL-S CPU
support.

Change-Id: I303fac78dac1ed7ccc9d531a6c3c10262f7273ee
Signed-off-by: Michał Żygowski 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76322
Tested-by: build bot (Jenkins) 
Reviewed-by: Michał Kopeć 
Reviewed-by: Eric Lai 
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 11 insertions(+), 2 deletions(-)

Approvals:
  Michał Kopeć: Looks good to me, approved
  Eric Lai: Looks good to me, but someone else must approve
  build bot (Jenkins): Verified

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 3e8f767..c9845ad 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -36,11 +36,18 @@
 config SOC_INTEL_ALDERLAKE_PCH_S
    bool
    select SOC_INTEL_ALDERLAKE
-	select HAVE_INTEL_FSP_REPO
+	select HAVE_INTEL_FSP_REPO if !SOC_INTEL_RAPTORLAKE_PCH_S || (SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT)
    select PLATFORM_USES_FSP2_3
    help
      Choose this option if your mainboard has a PCH-S chipset.

+config SOC_INTEL_RAPTORLAKE_PCH_S
+	bool
+	select SOC_INTEL_ALDERLAKE_PCH_S
+	select SOC_INTEL_RAPTORLAKE
+	help
+	  Choose this option if your mainboard has a Raptor Lake PCH-S chipset.
+
 if SOC_INTEL_ALDERLAKE

config CPU_SPECIFIC_OPTIONS
@@ -138,8 +145,8 @@

config SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT
    bool
-	default y if !SOC_INTEL_ALDERLAKE_PCH_S
    default n if SOC_INTEL_ALDERLAKE_PCH_S
+	default y
    select SOC_INTEL_COMMON_BLOCK_TCSS
    select SOC_INTEL_COMMON_BLOCK_USB4
    select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
@@ -399,6 +406,7 @@
    string "Location of FSP headers"
    default "src/vendorcode/intel/fsp/fsp2_0/alderlake_n/" if SOC_INTEL_ALDERLAKE_PCH_N && !FSP_USE_REPO
    default "src/vendorcode/intel/fsp/fsp2_0/raptorlake/" if SOC_INTEL_RAPTORLAKE && !FSP_USE_REPO
+	default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/Include/" if SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT
    default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && FSP_TYPE_IOT
    default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S && FSP_TYPE_IOT
    default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P
@@ -408,6 +416,7 @@
 config FSP_FD_PATH
    string
    depends on FSP_USE_REPO
+	default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT
    default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && FSP_TYPE_IOT
    default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S && FSP_TYPE_IOT
    default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P