[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/{adl,mtl}: Don't set up SPD on LPDDRx

[Arthur Heymans (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, Subrata Banik, Tarun.

Arthur Heymans has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84205?usp=email )

Change subject: soc/intel/{adl,mtl}: Don't set up SPD on LPDDRx
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Patch Set 3:

(1 comment)

File src/soc/intel/meteorlake/meminit.c:

https://review.coreboot.org/c/coreboot/+/84205/comment/c74bd2c9_e4ed83df?usp... :
PS2, Line 209: has_spd = true;
> Can you help me understand the purpose of `has_spd`? Does it mean the mainboard has an SPD chip and we'll read the hex file using SMBUS?

would need_spd be a better name? LPDDRx DRAM technology does not use SPD and the code for SPD in soc/intel/common is doing doing undefined behavior like overflowing an array.