[coreboot-gerrit] [M] Change in coreboot[master]: soc/amd/mendocino/uart: separate data and code

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68528 )

Change subject: soc/amd/mendocino/uart: separate data and code
......................................................................

soc/amd/mendocino/uart: separate data and code

The goal of this is to be able to move most of the code over to the
common AMD blocks.

Signed-off-by: Felix Held 
Change-Id: I5077681b64dd68351340bd179838a174d8df1701
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68528
Tested-by: build bot (Jenkins) 
Reviewed-by: Fred Reitberger 
---
M src/soc/amd/mendocino/uart.c
1 file changed, 55 insertions(+), 40 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Fred Reitberger: Looks good to me, approved

diff --git a/src/soc/amd/mendocino/uart.c b/src/soc/amd/mendocino/uart.c
index ac98a79..3809b85 100644
--- a/src/soc/amd/mendocino/uart.c
+++ b/src/soc/amd/mendocino/uart.c
@@ -15,28 +15,30 @@

static const struct {
    uintptr_t base;
+	unsigned int aoac_device;
+	const char *acpi_name;
    struct soc_amd_gpio mux[2];
 } uart_info[] = {
-	[0] = { APU_UART0_BASE, {
+	[0] =	{ APU_UART0_BASE, FCH_AOAC_DEV_UART0, "FUR0", {
    		PAD_NF(GPIO_143, UART0_TXD, PULL_NONE),
    		PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),
-	} },
-	[1] = { APU_UART1_BASE, {
+		} },
+	[1] =	{ APU_UART1_BASE, FCH_AOAC_DEV_UART1, "FUR1", {
    		PAD_NF(GPIO_140, UART1_TXD, PULL_NONE),
    		PAD_NF(GPIO_142, UART1_RXD, PULL_NONE),
-	} },
-	[2] = { APU_UART2_BASE, {
+		} },
+	[2] =	{ APU_UART2_BASE, FCH_AOAC_DEV_UART2, "FUR2", {
    		PAD_NF(GPIO_138, UART2_TXD, PULL_NONE),
    		PAD_NF(GPIO_136, UART2_RXD, PULL_NONE),
-	} },
-	[3] = { APU_UART3_BASE, {
+		} },
+	[3] =	{ APU_UART3_BASE, FCH_AOAC_DEV_UART3, "FUR3", {
    		PAD_NF(GPIO_135, UART3_TXD, PULL_NONE),
    		PAD_NF(GPIO_137, UART3_RXD, PULL_NONE),
-	} },
-	[4] = { APU_UART4_BASE, {
+		} },
+	[4] =	{ APU_UART4_BASE, FCH_AOAC_DEV_UART4, "FUR4", {
    		PAD_NF(GPIO_156, UART4_TXD, PULL_NONE),
    		PAD_NF(GPIO_155, UART4_RXD, PULL_NONE),
-	} },
+		} },
 };

uintptr_t get_uart_base(unsigned int idx)
@@ -47,6 +49,28 @@
    return uart_info[idx].base;
 }

+static enum cb_err get_uart_idx(uintptr_t base, unsigned int *idx)
+{
+	unsigned int i;
+	for (i = 0; i < ARRAY_SIZE(uart_info); i++) {
+		if (base == uart_info[i].base) {
+			*idx = i;
+			return CB_SUCCESS;
+		}
+	}
+	return CB_ERR;
+}
+
+static enum cb_err get_uart_aoac_device(uintptr_t base, unsigned int *aoac_dev)
+{
+	unsigned int idx;
+	if (get_uart_idx(base, &idx) == CB_ERR)
+		return CB_ERR;
+
+	*aoac_dev = uart_info[idx].aoac_device;
+	return CB_SUCCESS;
+}
+
 void clear_uart_legacy_config(void)
 {
    write16p(FCH_LEGACY_UART_DECODE, 0);
@@ -62,20 +86,11 @@

static const char *uart_acpi_name(const struct device *dev)
 {
-	switch (dev->path.mmio.addr) {
-	case APU_UART0_BASE:
-		return "FUR0";
-	case APU_UART1_BASE:
-		return "FUR1";
-	case APU_UART2_BASE:
-		return "FUR2";
-	case APU_UART3_BASE:
-		return "FUR3";
-	case APU_UART4_BASE:
-		return "FUR4";
-	default:
+	unsigned int idx;
+	if (get_uart_idx(dev->path.mmio.addr, &idx) == CB_SUCCESS)
+		return uart_info[idx].acpi_name;
+	else
    	return NULL;
-	}
 }

/* Even though this is called enable, it gets called for both enabled and disabled devices. */
@@ -83,23 +98,7 @@
 {
    unsigned int dev_id;

-	switch (dev->path.mmio.addr) {
-	case APU_UART0_BASE:
-		dev_id = FCH_AOAC_DEV_UART0;
-		break;
-	case APU_UART1_BASE:
-		dev_id = FCH_AOAC_DEV_UART1;
-		break;
-	case APU_UART2_BASE:
-		dev_id = FCH_AOAC_DEV_UART2;
-		break;
-	case APU_UART3_BASE:
-		dev_id = FCH_AOAC_DEV_UART3;
-		break;
-	case APU_UART4_BASE:
-		dev_id = FCH_AOAC_DEV_UART4;
-		break;
-	default:
+	if (get_uart_aoac_device(dev->path.mmio.addr, &dev_id) == CB_ERR) {
    	printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
    	return;
    }