Attention is currently required from: Jérémy Compostella, Subrata Banik.
Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/84174?usp=email )
Change subject: src/{incl/cpu, soc/intel/cmn}: Add Extended Feature Enable Register Macro
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Patch Set 6:
(1 comment)
File src/include/cpu/x86/msr.h:
https://review.coreboot.org/c/coreboot/+/84174/comment/320f6c1b_fb1e2767?usp... :
PS4, Line 65: #define PWR_PERF_PLTFRM_OVR (1 << 18)
: #define VR_THERM_ALERT_DISABLE_LOCK (1 << 23)
same
Moved to Offset 1fc in src/soc/intel/common/block/include/intelblocks/msr.h & added proper indent.
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