Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30158 )
Change subject: soc/intel/icelake: Enable support for FSP 2.1 specification ......................................................................
soc/intel/icelake: Enable support for FSP 2.1 specification
Remove FSP 2.0 support from ICL SoC and add FSP 2.1 support.
Change-Id: Ife0c133ddbf2e0fa14f94ffec15d11830cfaf7b3 Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/30158 Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/icelake/Kconfig 1 file changed, 1 insertion(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 34af339..2e9e3e2 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -19,7 +19,6 @@ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select FSP_USES_CB_STACK select GENERIC_GPIO_LIB select HAVE_FSP_GOP select INTEL_DESCRIPTOR_MODE_CAPABLE @@ -32,8 +31,8 @@ select MRC_SETTINGS_PROTECT select PARALLEL_MP select PARALLEL_MP_AP_WORK - select PLATFORM_USES_FSP2_0 select MICROCODE_BLOB_UNDISCLOSED + select PLATFORM_USES_FSP2_1 select POSTCAR_CONSOLE select POSTCAR_STAGE select REG_SCRIPT