Attention is currently required from: Angel Pons, Felix Singer, Maxim, Michał Kopeć, Michał Żygowski, Nicholas Chin, Paul Menzel.
Hello Felix Singer, Maxim, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80853?usp=email
to look at the new patch set (#12).
Change subject: mb/erying: Add Erying Polestar G613 Pro (TGL-H) ......................................................................
mb/erying: Add Erying Polestar G613 Pro (TGL-H)
Erying is a Chinese manufacturer selling desktop motherboards with laptop SoCs and custom shim to mount desktop coolers.
Working: - Serial port (IT8613E 0x3f8) - All rear USB ports (3.0, 2.0) - Both HDMI ports - Realtek GbE NIC - Internal audio (ALC897/ TGL-H HDMI) - Environment Controller (SuperIO fan control) - All SATA ports - All PCI-E/M.2 ports - M.2 NGFF WiFi - PCI-E Resizable BAR (ReBAR) - VT-x
WIP/Broken: - PCI-E ASPM (also broken on vendor's FW, clocks are messed up) - S3/s0ix (also broken on stock, setting 3VSB register didn't help - system goes to sleep, but RAM loses power) - DisplayPort on I/O panel (seemingly a simple fix) - One of USB2 FP connectors, as well as NGFF USB isn't mapped (yet) - Automatic fan control (IT8613E can't read CPU_TIN at the moment)
Can be flashed using `flashrom -p internal -w build/coreboot.rom`, as vendor hasn't enabled any protections on SPI chip.
TEST=Flash coreboot build onto the motherboard, install following PCI-E cards: Radeon RX 7800XT, Kingston KC3000, Optane 900P, Audigy X-Fi. Power the system up and boot into Windows 10 to check ACPI sanity, then reboot into Fedora Linux (kernel 6.10.9) and launch 3D application, disk benchmark, compilation at the same time to check system's stability.
Change-Id: Iffb9e357da2eb686bdcd9a9837df8a60fa94011e Signed-off-by: Alicja Michalska ahplka19@gmail.com --- A src/mainboard/erying/Kconfig A src/mainboard/erying/Kconfig.name A src/mainboard/erying/tgl/Kconfig A src/mainboard/erying/tgl/Kconfig.name A src/mainboard/erying/tgl/Makefile.mk A src/mainboard/erying/tgl/board_info.txt A src/mainboard/erying/tgl/bootblock.c A src/mainboard/erying/tgl/cmos.layout A src/mainboard/erying/tgl/data.vbt A src/mainboard/erying/tgl/devicetree.cb A src/mainboard/erying/tgl/dsdt.asl A src/mainboard/erying/tgl/gpio.h A src/mainboard/erying/tgl/hda_verb.c A src/mainboard/erying/tgl/ramstage.c A src/mainboard/erying/tgl/romstage_fsp_params.c 15 files changed, 842 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/80853/12