Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83106?usp=email )
Change subject: soc/intel: Adapt crashlog IP to also support 64-bit ......................................................................
soc/intel: Adapt crashlog IP to also support 64-bit
This patch extends the crashlog IP support beyond 32-bit mode to support Intel future generation SoCs, which may require crashlog support for 64-bit architectures. uintptr_t data type is used for Address pointers and void* for dereferencing
BUG=b:346676856 TEST=Successfully built Meteor Lake (rex) and tested for google/rex0 and google/rex64 images.
Change-Id: I552257d3770abb409e2dcd8a13392506b5e7feb7 Signed-off-by: Sowmya Aralguppe sowmya.aralguppe@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/83106 Reviewed-by: Subrata Banik subratabanik@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/alderlake/crashlog.c M src/soc/intel/common/block/crashlog/crashlog.c M src/soc/intel/common/block/include/intelblocks/crashlog.h M src/soc/intel/meteorlake/crashlog.c M src/soc/intel/tigerlake/crashlog_lib.c 5 files changed, 79 insertions(+), 78 deletions(-)
Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/intel/alderlake/crashlog.c b/src/soc/intel/alderlake/crashlog.c index 5a08c25..a85fa01 100644 --- a/src/soc/intel/alderlake/crashlog.c +++ b/src/soc/intel/alderlake/crashlog.c @@ -23,7 +23,7 @@ static tel_crashlog_devsc_cap_t cpu_cl_devsc_cap; static cpu_crashlog_discovery_table_t cpu_cl_disc_tab;
-u32 __weak cl_get_cpu_mb_int_addr(void) +uintptr_t __weak cl_get_cpu_mb_int_addr(void) { return CRASHLOG_MAILBOX_INTF_ADDRESS; } @@ -119,7 +119,7 @@ return true; }
-u32 cl_get_cpu_bar_addr(void) +uintptr_t cl_get_cpu_bar_addr(void) { u32 base_addr = 0; if (cpu_cl_devsc_cap.discovery_data.fields.t_bir_q == TEL_DVSEC_TBIR_BAR0) { @@ -137,7 +137,7 @@ }
-u32 cl_get_cpu_tmp_bar(void) +uintptr_t cl_get_cpu_tmp_bar(void) { return sram_get_bar(); } @@ -189,8 +189,12 @@
static bool cpu_cl_gen_discovery_table(void) { - u32 bar_addr = 0, disc_tab_addr = 0; + uintptr_t bar_addr = 0, disc_tab_addr = 0; bar_addr = cl_get_cpu_bar_addr(); + + if (!bar_addr) + return false; + disc_tab_addr = bar_addr + cpu_cl_devsc_cap.discovery_data.fields.discovery_table_offset; memset(&cpu_cl_disc_tab, 0, sizeof(cpu_crashlog_discovery_table_t)); diff --git a/src/soc/intel/common/block/crashlog/crashlog.c b/src/soc/intel/common/block/crashlog/crashlog.c index d92d7bc..041c8bf 100644 --- a/src/soc/intel/common/block/crashlog/crashlog.c +++ b/src/soc/intel/common/block/crashlog/crashlog.c @@ -17,7 +17,7 @@ return 0; }
-u32 __weak cl_get_cpu_bar_addr(void) +uintptr_t __weak cl_get_cpu_bar_addr(void) { return 0; } @@ -27,12 +27,12 @@ return 0; }
-u32 __weak cl_get_cpu_tmp_bar(void) +uintptr_t __weak cl_get_cpu_tmp_bar(void) { return 0; }
-u32 __weak cl_get_cpu_mb_int_addr(void) +uintptr_t __weak cl_get_cpu_mb_int_addr(void) { return 0; } @@ -106,13 +106,13 @@ return cpu_disc_tab; }
-int cpu_cl_poll_mailbox_ready(u32 cl_mailbox_addr) +int cpu_cl_poll_mailbox_ready(uintptr_t cl_mailbox_addr) { cpu_crashlog_mailbox_t cl_mailbox_interface; u16 stall_cnt = 0;
do { - cl_mailbox_interface.data = read32((u32 *)(uintptr_t)cl_mailbox_addr); + cl_mailbox_interface.data = read32p(cl_mailbox_addr); udelay(CPU_CRASHLOG_WAIT_STALL); stall_cnt++; } while ((cl_mailbox_interface.fields.busy == 1) @@ -130,7 +130,7 @@ int cpu_cl_mailbox_cmd(u8 cmd, u8 param) { cpu_crashlog_mailbox_t cl_mailbox_intf; - u32 cl_base_addr; + uintptr_t cl_base_addr;
memset(&cl_mailbox_intf, 0, sizeof(cpu_crashlog_mailbox_t));
@@ -140,7 +140,7 @@ cl_mailbox_intf.fields.param = param; cl_mailbox_intf.fields.busy = 1;
- write32((u32 *)(uintptr_t)(cl_base_addr + cl_get_cpu_mb_int_addr()), + write32p((cl_base_addr + cl_get_cpu_mb_int_addr()), cl_mailbox_intf.data);
cpu_cl_poll_mailbox_ready(cl_base_addr + cl_get_cpu_mb_int_addr()); @@ -163,12 +163,12 @@ /* empty implementation */ }
-int pmc_cl_gen_descriptor_table(u32 desc_table_addr, +int pmc_cl_gen_descriptor_table(uintptr_t desc_table_addr, pmc_crashlog_desc_table_t *descriptor_table) { int total_data_size = 0; - descriptor_table->numb_regions = read32((u32 *)(uintptr_t)desc_table_addr); - printk(BIOS_DEBUG, "CL PMC desc table: numb of regions is 0x%x at addr 0x%x\n", + descriptor_table->numb_regions = read32p(desc_table_addr); + printk(BIOS_DEBUG, "CL PMC desc table: numb of regions is 0x%x at addr 0x%lx\n", descriptor_table->numb_regions, desc_table_addr); for (int i = 0; i < descriptor_table->numb_regions; i++) { if (i >= ARRAY_SIZE(descriptor_table->regions)) { @@ -177,8 +177,8 @@ ARRAY_SIZE(descriptor_table->regions)); break; } - desc_table_addr += 4; - descriptor_table->regions[i].data = read32((u32 *)(uintptr_t)(desc_table_addr)); + desc_table_addr += sizeof(u32); + descriptor_table->regions[i].data = read32p(desc_table_addr); total_data_size += descriptor_table->regions[i].bits.size * sizeof(u32); printk(BIOS_DEBUG, "CL PMC desc table: region 0x%x has size 0x%x at offset 0x%x\n", i, descriptor_table->regions[i].bits.size, @@ -280,49 +280,45 @@ return (cpu_cl_discovered || pmc_cl_discovered); }
-bool cl_copy_data_from_sram(u32 src_bar, - u32 offset, - u32 size, - u32 *dest_addr, - u32 buffer_index, - bool pmc_sram) +bool cl_copy_data_from_sram(uintptr_t src_bar, u32 offset, size_t size, u32 *dest_addr, + u32 buffer_index, bool pmc_sram) { if (src_bar == 0) { - printk(BIOS_ERR, "Invalid bar 0x%x and offset 0x%x for %s\n", + printk(BIOS_ERR, "Invalid bar 0x%lx and offset 0x%x for %s\n", src_bar, offset, __func__); return false; }
- u32 src_addr = src_bar + offset; + uintptr_t src_addr = src_bar + offset;
- u32 data = read32((u32 *)(uintptr_t)src_addr); + u32 data = read32p(src_addr);
/* First 32bits of the record must not be 0xdeadbeef */ if (data == INVALID_CRASHLOG_RECORD) { - printk(BIOS_DEBUG, "Invalid data 0x%x at offset 0x%x from addr 0x%x\n", + printk(BIOS_DEBUG, "Invalid data 0x%x at offset 0x%x from addr 0x%lx\n", data, offset, src_bar); return false; }
/* PMC: copy if 1st DWORD in buffer is not zero and its 31st bit is not set */ if (pmc_sram && !(data && !(data & BIT(31)))) { - printk(BIOS_DEBUG, "Invalid data 0x%x at offset 0x%x from addr 0x%x" + printk(BIOS_DEBUG, "Invalid data 0x%x at offset 0x%x from addr 0x%lx" " of PMC SRAM.\n", data, offset, src_bar); return false; } /*CPU: don't copy if 1st DWORD in first buffer is zero */ if (!pmc_sram && !data && (buffer_index == 0)) { - printk(BIOS_DEBUG, "Invalid data 0x%x at offset 0x%x from addr 0x%x" + printk(BIOS_DEBUG, "Invalid data 0x%x at offset 0x%x from addr 0x%lx" " of telemetry SRAM.\n", data, offset, src_bar); return false; }
- u32 copied = 0; + size_t copied = 0; while (copied < size) { /* DW by DW copy: byte access to PMC SRAM not allowed */ - *dest_addr = read32((u32 *)(uintptr_t)src_addr); + *dest_addr = read32p(src_addr); dest_addr++; - src_addr += 4; + src_addr += sizeof(u32); copied++; } return true; @@ -355,7 +351,7 @@
void __weak cl_get_pmc_sram_data(cl_node_t *head) { - u32 tmp_bar_addr = cl_get_cpu_tmp_bar(); + uintptr_t tmp_bar_addr = cl_get_cpu_tmp_bar(); u32 pmc_crashLog_size = cl_get_pmc_record_size(); cl_node_t *cl_cur = head;
@@ -476,9 +472,8 @@ }
for (int i = 0 ; i < cpu_cl_disc_tab.header.fields.count ; i++) { - u32 cpu_bar_addr = cl_get_cpu_bar_addr(); + uintptr_t cpu_bar_addr = cl_get_cpu_bar_addr(); bool pmc_sram = false; - if (!cpu_cl_disc_tab.buffers[i].fields.size) { continue; } diff --git a/src/soc/intel/common/block/include/intelblocks/crashlog.h b/src/soc/intel/common/block/include/intelblocks/crashlog.h index ff80b1c..5e2e8c3 100644 --- a/src/soc/intel/common/block/include/intelblocks/crashlog.h +++ b/src/soc/intel/common/block/include/intelblocks/crashlog.h @@ -181,9 +181,9 @@ int cl_get_cpu_record_size(void); int cl_get_pmc_record_size(void); int cl_get_ioe_record_size(void); -u32 cl_get_cpu_bar_addr(void); -u32 cl_get_cpu_tmp_bar(void); -u32 cl_get_cpu_mb_int_addr(void); +uintptr_t cl_get_cpu_bar_addr(void); +uintptr_t cl_get_cpu_tmp_bar(void); +uintptr_t cl_get_cpu_mb_int_addr(void); int cl_get_total_data_size(void); bool cl_pmc_sram_has_mmio_access(void); bool cl_ioe_sram_has_mmio_access(void); @@ -201,13 +201,13 @@ pmc_ipc_discovery_buf_t cl_get_pmc_discovery_buf(void); pmc_crashlog_desc_table_t cl_get_pmc_descriptor_table(void); cpu_crashlog_discovery_table_t cl_get_cpu_discovery_table(void); -u32 cl_gen_cpu_bar_addr(void); -int cpu_cl_poll_mailbox_ready(u32 cl_mailbox_addr); +uintptr_t cl_gen_cpu_bar_addr(void); +int cpu_cl_poll_mailbox_ready(uintptr_t cl_mailbox_addr); int cpu_cl_mailbox_cmd(u8 cmd, u8 param); int cpu_cl_clear_data(void); void cpu_cl_rearm(void); void cpu_cl_cleanup(void); -int pmc_cl_gen_descriptor_table(u32 desc_table_addr, +int pmc_cl_gen_descriptor_table(uintptr_t desc_table_addr, pmc_crashlog_desc_table_t *descriptor_table); bool pmc_cl_discovery(void); bool cpu_cl_discovery(void); @@ -215,12 +215,8 @@ int cl_pmc_clear(void); int cl_pmc_en_gen_on_all_reboot(void); bool discover_crashlog(void); -bool cl_copy_data_from_sram(u32 src_bar, - u32 offset, - u32 size, - u32 *dest_addr, - u32 buffer_index, - bool pmc_sram); +bool cl_copy_data_from_sram(uintptr_t src_bar, u32 offset, size_t size, u32 *dest_addr, + u32 buffer_index, bool pmc_sram); void collect_pmc_and_cpu_crashlog_from_srams(cl_node_t *head); static const EFI_GUID FW_ERR_SECTION_GUID = { 0x81212a96, 0x09ed, 0x4996, diff --git a/src/soc/intel/meteorlake/crashlog.c b/src/soc/intel/meteorlake/crashlog.c index 0321e00..c792d56 100644 --- a/src/soc/intel/meteorlake/crashlog.c +++ b/src/soc/intel/meteorlake/crashlog.c @@ -14,6 +14,7 @@ #include <string.h>
#define CONTROL_INTERFACE_OFFSET 0x5 +#define CRASHLOG_NODES_COUNT 0x2 /* Crashlog record of PUNIT & Uncore of SoC-N Die */ #define CRASHLOG_PUNIT_STORAGE_OFF_MASK BIT(24) #define CRASHLOG_RE_ARM_STATUS_MASK BIT(25) #define CRASHLOG_CONSUMED_MASK BIT(31) @@ -30,11 +31,11 @@ static pmc_crashlog_desc_table_t descriptor_table; static tel_crashlog_devsc_cap_t cpu_cl_devsc_cap; static cpu_crashlog_discovery_table_t cpu_cl_disc_tab; -static u32 disc_tab_addr; +static uintptr_t disc_tab_addr;
static u64 get_disc_tab_header(void) { - return read64((void *)(uintptr_t)disc_tab_addr); + return read64p(disc_tab_addr); }
/* Get the SRAM BAR. */ @@ -62,7 +63,7 @@ return sram_bar; }
-static void configure_sram(const struct device *sram_dev, u32 base_addr) +static void configure_sram(const struct device *sram_dev, uintptr_t base_addr) { pci_update_config16(sram_dev, PCI_COMMAND, ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY), 0);
@@ -73,8 +74,8 @@
void cl_get_pmc_sram_data(cl_node_t *head) { - u32 pmc_sram_base = cl_get_cpu_tmp_bar(); - u32 ioe_sram_base = get_sram_bar(PCI_DEVFN_IOE_SRAM); + uintptr_t pmc_sram_base = cl_get_cpu_tmp_bar(); + uintptr_t ioe_sram_base = get_sram_bar(PCI_DEVFN_IOE_SRAM); u32 pmc_crashLog_size = cl_get_pmc_record_size(); cl_node_t *cl_cur = head;
@@ -110,7 +111,7 @@
/* process crashlog records */ for (int i = 0; i < descriptor_table.numb_regions + 1; i++) { - u32 sram_base = 0; + uintptr_t sram_base = 0; bool pmc_sram = true; printk(BIOS_DEBUG, "Region[0x%x].Tag=0x%x offset=0x%x, size=0x%x\n", i, @@ -183,7 +184,7 @@
bool pmc_cl_discovery(void) { - u32 bar_addr = 0, desc_table_addr = 0; + uintptr_t bar_addr = 0, desc_table_addr = 0;
const struct pmc_ipc_buffer req = { 0 }; struct pmc_ipc_buffer res; @@ -238,9 +239,9 @@ return true; }
-u32 cl_get_cpu_bar_addr(void) +uintptr_t cl_get_cpu_bar_addr(void) { - u32 base_addr = 0; + uintptr_t base_addr = 0; if (cpu_cl_devsc_cap.discovery_data.fields.t_bir_q == TEL_DVSEC_TBIR_BAR0) { base_addr = pci_read_config32(PCI_DEV_TELEMETRY, PCI_BASE_ADDRESS_0) & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK; @@ -255,7 +256,7 @@ return base_addr; }
-u32 cl_get_cpu_tmp_bar(void) +uintptr_t cl_get_cpu_tmp_bar(void) { return get_sram_bar(PCI_DEVFN_SRAM); } @@ -331,37 +332,38 @@
static bool cpu_cl_gen_discovery_table(void) { - u32 bar_addr = cl_get_cpu_bar_addr(); + uintptr_t bar_addr = cl_get_cpu_bar_addr();
if (!bar_addr) return false;
disc_tab_addr = bar_addr + get_disc_table_offset(); - - u32 dw0 = read32((u32 *)(uintptr_t)disc_tab_addr); - if (!is_crashlog_data_valid(dw0)) - return false; - memset(&cpu_cl_disc_tab, 0, sizeof(cpu_crashlog_discovery_table_t)); cpu_cl_disc_tab.header.data = get_disc_tab_header(); - printk(BIOS_DEBUG, "cpu_crashlog_discovery_table buffer count: 0x%x\n", - cpu_cl_disc_tab.header.fields.count); + /* Check both 32 bit header data and status register for non-zero values */ + if ((!is_crashlog_data_valid(cpu_cl_disc_tab.header.data & 0xFFFFFFFF)) && + (!is_crashlog_data_valid((cpu_cl_disc_tab.header.data) >> 32))) + return false;
- int cur_offset = 0; + u32 cur_offset = 0; + cpu_cl_disc_tab.header.fields.count = CRASHLOG_NODES_COUNT; + printk(BIOS_DEBUG, "cpu_crashlog_discovery_table buffer count: 0x%x\n", + cpu_cl_disc_tab.header.fields.count); for (int i = 0; i < cpu_cl_disc_tab.header.fields.count; i++) { cur_offset = 8 + 24 * i; - - dw0 = read32((u32 *)(uintptr_t)disc_tab_addr + cur_offset); - if (!is_crashlog_data_valid(dw0)) + u32 cl_buffer_size = read32p(disc_tab_addr + cur_offset + 4); + /* Check for buffer size */ + if (!(is_crashlog_data_valid(cl_buffer_size))) continue;
+ u32 dw0 = read32p(disc_tab_addr + cur_offset); if (dw0 & CRASHLOG_CONSUMED_MASK) { printk(BIOS_DEBUG, "cpu crashlog records already consumed." "id: 0x%x dw0: 0x%x\n", i, dw0); break; }
- cpu_cl_disc_tab.buffers[i].data = read64((void *)(uintptr_t)(disc_tab_addr + cur_offset)); + cpu_cl_disc_tab.buffers[i].data = read64p(disc_tab_addr + cur_offset); printk(BIOS_DEBUG, "cpu_crashlog_discovery_table buffer: 0x%x size: " "0x%x offset: 0x%x\n", i, cpu_cl_disc_tab.buffers[i].fields.size, cpu_cl_disc_tab.buffers[i].fields.offset); @@ -411,7 +413,7 @@ return m_pmc_crashLog_size + m_cpu_crashLog_size; }
-static u32 get_control_status_interface(void) +static uintptr_t get_control_status_interface(void) { if (disc_tab_addr) return (disc_tab_addr + CONTROL_INTERFACE_OFFSET * sizeof(u32)); @@ -439,7 +441,7 @@
void cpu_cl_rearm(void) { - u32 ctrl_sts_intfc_addr = get_control_status_interface(); + uintptr_t ctrl_sts_intfc_addr = get_control_status_interface();
if (!ctrl_sts_intfc_addr) { printk(BIOS_ERR, "CPU crashlog control and status interface address not valid\n"); @@ -450,7 +452,7 @@ cl_punit_control_interface_t punit_ctrl_intfc; memset(&punit_ctrl_intfc, 0, sizeof(cl_punit_control_interface_t)); punit_ctrl_intfc.fields.set_re_arm = 1; - write32((u32 *)(uintptr_t)(ctrl_sts_intfc_addr), punit_ctrl_intfc.data); + write32p(ctrl_sts_intfc_addr, punit_ctrl_intfc.data);
if (!wait_and_check(CRASHLOG_RE_ARM_STATUS_MASK)) printk(BIOS_ERR, "CPU crashlog re_arm not asserted\n"); @@ -461,7 +463,7 @@ void cpu_cl_cleanup(void) { /* Perform any SOC specific cleanup after reading the crashlog data from SRAM */ - u32 ctrl_sts_intfc_addr = get_control_status_interface(); + uintptr_t ctrl_sts_intfc_addr = get_control_status_interface();
if (!ctrl_sts_intfc_addr) { printk(BIOS_ERR, "CPU crashlog control and status interface address not valid\n"); @@ -480,7 +482,7 @@ cl_punit_control_interface_t punit_ctrl_intfc; memset(&punit_ctrl_intfc, 0, sizeof(cl_punit_control_interface_t)); punit_ctrl_intfc.fields.set_storage_off = 1; - write32((u32 *)(uintptr_t)(ctrl_sts_intfc_addr), punit_ctrl_intfc.data); + write32p(ctrl_sts_intfc_addr, punit_ctrl_intfc.data);
if (!wait_and_check(CRASHLOG_PUNIT_STORAGE_OFF_MASK)) printk(BIOS_ERR, "CPU crashlog storage_off not asserted\n"); diff --git a/src/soc/intel/tigerlake/crashlog_lib.c b/src/soc/intel/tigerlake/crashlog_lib.c index fca38a1..c254519 100644 --- a/src/soc/intel/tigerlake/crashlog_lib.c +++ b/src/soc/intel/tigerlake/crashlog_lib.c @@ -21,7 +21,7 @@ static tel_crashlog_devsc_cap_t cpu_cl_devsc_cap; static cpu_crashlog_discovery_table_t cpu_cl_disc_tab;
-u32 __weak cl_get_cpu_mb_int_addr(void) +uintptr_t __weak cl_get_cpu_mb_int_addr(void) { return CRASHLOG_MAILBOX_INTF_ADDRESS; } @@ -91,7 +91,7 @@ return true; }
-u32 cl_get_cpu_bar_addr(void) +uintptr_t cl_get_cpu_bar_addr(void) { u32 base_addr = 0; if (cpu_cl_devsc_cap.discovery_data.fields.t_bir_q == TEL_DVSEC_TBIR_BAR0) { @@ -109,7 +109,7 @@ }
-u32 cl_get_cpu_tmp_bar(void) +uintptr_t cl_get_cpu_tmp_bar(void) { return SPI_BASE_ADDRESS; } @@ -161,8 +161,12 @@
static bool cpu_cl_gen_discovery_table(void) { - u32 bar_addr = 0, disc_tab_addr = 0; + uintptr_t bar_addr = 0, disc_tab_addr = 0; bar_addr = cl_get_cpu_bar_addr(); + + if (!bar_addr) + return false; + disc_tab_addr = bar_addr + cpu_cl_devsc_cap.discovery_data.fields.discovery_table_offset; memset(&cpu_cl_disc_tab, 0, sizeof(cpu_crashlog_discovery_table_t));