Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79992?usp=email )
Change subject: mb/google/rex/var/rex: Set TCC to 100°C ......................................................................
mb/google/rex/var/rex: Set TCC to 100°C
Set tcc_offset value to 10 in devicetree for Thermal Control Circuit (TCC) activation feature for rex.
BUG=b:270664854 TEST=Build, boot and test on rex with value under sysfs /sys/bus/pci/devices/0000:00:04.0/tcc_offset_degree_celsius
Change-Id: I9012984016ab3213102214025d6d8dc07c5d8974 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/79992 Reviewed-by: Subrata Banik subratabanik@google.com Reviewed-by: Peter Ou peter.ou@quanta.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: Peter Ou: Looks good to me, but someone else must approve build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index 9f86840..58c1719 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -45,6 +45,9 @@ # DPTF enable register "dptf_enable" = "1"
+ # Setting TCC of 100C = Tj max (110) - TCC_Offset (10) + register "tcc_offset" = "10" + # Enable CNVi BT register "cnvi_bt_core" = "true"