[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/smbus: Add `finalize` operation for smbus

[Subrata Banik (Code Review)]

Attention is currently required from: Felix Singer, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Lean Sheng Tan, Eric Lai, Werner Zeh.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63640 )

Change subject: soc/intel/common/smbus: Add `finalize` operation for smbus
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Patch Set 5:

(1 comment)

File src/soc/intel/common/block/smbus/smbus.c:

https://review.coreboot.org/c/coreboot/+/63640/comment/1de50379_a854c0bb 
PS5, Line 77: tco_lockdown();
> So why is this call even necessary here, because it is already taken care of in pch_finalize regardless? Seems like this part (of FSP PCI enum finalize step) is already taken care of in current coreboot code.

In case we have SMBUS PCI device is visible over PCI Bus, it's important to ensure that TCO base address is locked before running 3rd party code (like Option ROM), hence, Intel security guideline recommended to lock TCO base with FSP Notify Phase 1 API call(on PCI enumeration).