Attention is currently required from: Jason Glenesk, Raul Rangel, Martin L Roth, Marshall Dawson, Paul Menzel, Fred Reitberger, Rob Barnes, Karthik Ramasubramanian, Felix Held.
Robert Zieba has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61259 )
Change subject: soc/amd/cezanne: Turn off gpp clock request for disabled devices
......................................................................
Patch Set 35:
(3 comments)
File src/soc/amd/cezanne/fch.c:
https://review.coreboot.org/c/coreboot/+/61259/comment/9cc6f190_d10f32ae
PS34, Line 183: assert(gpp_req_index >= 0 && gpp_req_index < gpp_clk_config_num);
by default asserts aren't fatal, so it'll complain but still continue; not sure if this is intended […]
Done
https://review.coreboot.org/c/coreboot/+/61259/comment/a6d3a55e_d2d75ea2
PS34, Line 196: /* PCIe devices haven't been fully set up yet, so directly read the vendor id
the code below reads both the vendor and product id; both ids are just 16 bit with the vendor id sta […]
Done
https://review.coreboot.org/c/coreboot/+/61259/comment/7c421189_af00ac33
PS34, Line 200: && (id != 0x0000ffff) && (id != 0xffff0000)
not sure if those two cases are needed. […]
Done
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