Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83074?usp=email )
Change subject: mb/google/nissa/var/nivviks: Add fw_config fields for wifi6 and wifi7 ......................................................................
mb/google/nissa/var/nivviks: Add fw_config fields for wifi6 and wifi7
Add a new fw config field for wifi category as WIFI_6, which is CNVi based and WIFI_7, which is PCIe based. Also, enable WIFI_6 for existing CNVi based wifi port as well as bluetooth port.
BUG=b:345596420 BRANCH=NONE TEST=Verified Wifi6 module detection
Change-Id: I4b218f772405bdb1b741b4d5e640d7b4f145cd76 Signed-off-by: Poornima Tom poornima.tom@intel.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/83074 Reviewed-by: Eric Lai ericllai@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subratabanik@google.com --- M src/mainboard/google/brya/variants/nivviks/overridetree.cb 1 file changed, 8 insertions(+), 1 deletion(-)
Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb index 444a9a0..4528016 100644 --- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb @@ -20,6 +20,10 @@ option STYLUS_PRESENT 0 option STYLUS_ABSENT 1 end + field WIFI_CATEGORY 7 + option WIFI_6 0 # CNVi + option WIFI_7 1 # PCIe + end end
chip soc/intel/alderlake @@ -289,6 +293,7 @@ register "enable_cnvi_ddr_rfim" = "true" device generic 0 on end end + probe WIFI_CATEGORY WIFI_6 end device ref i2c1 on chip drivers/i2c/hid @@ -628,7 +633,9 @@ register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" - device ref usb2_port10 on end + device ref usb2_port10 on + probe WIFI_CATEGORY WIFI_6 + end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A0 (MLB)""