Attention is currently required from: Jamie Ryu, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Angel Pons, Nick Vaccaro. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63198 )
Change subject: soc/intel/common: implement ioc driver ......................................................................
Patch Set 11:
(7 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63198/comment/7ef5e517_a47875a6 PS11, Line 9: IOC(I/O Cache) Please add a space before (.
https://review.coreboot.org/c/coreboot/+/63198/comment/fc9ec6cb_c0ed14af PS11, Line 11: https://github.com/otcshare/CCG-MTL-Generic-PSS/blob/master/ I get a 404 error, accessing that URL. Maybe mention, that it’s not public?
File src/soc/intel/common/block/ioc/Kconfig:
https://review.coreboot.org/c/coreboot/+/63198/comment/55b6f567_c637cc1a PS11, Line 4: Intel Processor common IO Cache (IOC) Please elaborate, what it does, and since what generation it’s available.
https://review.coreboot.org/c/coreboot/+/63198/comment/5fb6bd3f_f298a221 PS11, Line 9: ioc register offset override Please elaborate, what the default is, and when it should be changed.
https://review.coreboot.org/c/coreboot/+/63198/comment/a852c06c_4f94a3ce PS11, Line 9: ioc IOC
File src/soc/intel/common/block/ioc/ioc.c:
https://review.coreboot.org/c/coreboot/+/63198/comment/d530ba64_3ce71908 PS11, Line 16: return value; Is the temporary variable needed?
File src/soc/intel/common/pch/lockdown/lockdown.c:
https://review.coreboot.org/c/coreboot/+/63198/comment/3f6b1108_67cc0e4e PS11, Line 31: #if !CONFIG(SOC_INTEL_COMMON_BLOCK_IOC) : gpmr_or32(GPMR_DMICTL, GPMR_DMICTL_SRLOCK); : #endif Please use C code and not the preprocessor.