Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43925 )
Change subject: mb/supermicro/x11-lga1151-series: Relocate devicetree FSP settings ......................................................................
mb/supermicro/x11-lga1151-series: Relocate devicetree FSP settings
Tested with BUILD_TIMELESS=1, X11SSM-F does not change.
Change-Id: Ia85c1a7392ec812747d6438b6038724239645bda Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb 1 file changed, 39 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/43925/1
diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 0447e70..58e2510 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -7,40 +7,9 @@ register "speed_shift_enable" = "1"
# FSP Configuration - register "SmbusEnable" = "1" - register "ScsEmmcEnabled" = "0" - register "ScsEmmcHs400Enabled" = "0" - register "ScsSdCardEnabled" = "0" register "SkipExtGfxScan" = "1" - register "Device4Enable" = "1" register "SaGv" = "SaGv_Disabled"
- # SATA configuration - register "SataMode" = "KBLFSP_SATA_MODE_AHCI" - register "EnableSata" = "1" - register "SataSalpSupport" = "1" - register "SataPortsEnable" = "{ \ - [0] = 1, \ - [1] = 1, \ - [2] = 1, \ - [3] = 1, \ - [4] = 1, \ - [5] = 1, \ - [6] = 1, \ - [7] = 1, \ - }" - - register "SataPortsDevSlp" = "{\ - [0] = 0, \ - [1] = 0, \ - [2] = 0, \ - [3] = 0, \ - [4] = 0, \ - [5] = 0, \ - [6] = 0, \ - [7] = 0, \ - }" - # superspeed_inter-chip_supplement (SSIC) disabled register "SsicPortEnable" = "0"
@@ -89,7 +58,7 @@
# Lock Down register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, }"
device cpu_cluster 0 on @@ -101,7 +70,9 @@ device pci 01.1 off end # CPU PCIe Port 11 (x8) device pci 01.2 off end # CPU PCIe Port 12 (x4) device pci 02.0 off end # Integrated Graphics Device (IGD) - device pci 04.0 on end # SA thermal subsystem + device pci 04.0 on # SA thermal subsystem + register "Device4Enable" = "1" + end device pci 05.0 off end # Imaging Unit device pci 08.0 off end # Gaussion Mixture Model (GMM) device pci 13.0 off end # Integrated Sensor Hub @@ -117,7 +88,32 @@ device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection device pci 16.4 off end # Management Engine Interface 3 - device pci 17.0 on end # SATA + device pci 17.0 on # SATA + register "EnableSata" = "1" + register "SataMode" = "KBLFSP_SATA_MODE_AHCI" + register "SataSalpSupport" = "1" + register "SataPortsEnable" = "{ \ + [0] = 1, \ + [1] = 1, \ + [2] = 1, \ + [3] = 1, \ + [4] = 1, \ + [5] = 1, \ + [6] = 1, \ + [7] = 1, \ + }" + + register "SataPortsDevSlp" = "{\ + [0] = 0, \ + [1] = 0, \ + [2] = 0, \ + [3] = 0, \ + [4] = 0, \ + [5] = 0, \ + [6] = 0, \ + [7] = 0, \ + }" + end device pci 19.0 off end # UART #2 device pci 19.1 off end # I2C #5 device pci 19.2 off end # I2C #4 @@ -144,6 +140,12 @@ device pci 1e.0 off end # UART #0 device pci 1e.1 off end # UART #1 device pci 1e.2 off end # SPI #0 + + # eMMC/SD is disabled + register "ScsEmmcEnabled" = "0" + register "ScsEmmcHs400Enabled" = "0" + register "ScsSdCardEnabled" = "0" + device pci 1f.0 on # LPC Interface chip superio/common device pnp 2e.0 on end @@ -155,7 +157,9 @@ device pci 1f.1 on end # P2SB device pci 1f.2 on end # Power Management Controller device pci 1f.3 off end # Intel HDA - device pci 1f.4 on end # SMBus + device pci 1f.4 on # SMBus + register "SmbusEnable" = "1" + end device pci 1f.5 on end # SPI Controller device pci 1f.6 off end # GbE device pci 1f.7 off end # Intel Trace Hub