Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31632
Change subject: mb/google/arcada: Update USB2 port6 AFE setting ......................................................................
mb/google/arcada: Update USB2 port6 AFE setting
Accoriding to 574354, we need to tune each port to pass eye diagram other than just use recommanded setting as they are base guidence only.
Bug=b:124407280 TEST=Build and boot up on sarien board.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: I587695809b368edd33852c4241de097ca31e9d66 --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/31632/1
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 244ba7a..cded5ff 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -125,7 +125,14 @@ register "usb2_ports[3]" = "USB2_PORT_EMPTY" register "usb2_ports[4]" = "USB2_PORT_EMPTY" register "usb2_ports[5]" = "USB2_PORT_LONG(OC_SKIP)" # Camera - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # WWAN + register "usb2_ports[6]" = "{ + .enable = 1, \ + .ocpin = OC_SKIP, \ + .tx_bias = USB2_BIAS_0MV, \ + .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON, \ + .pre_emp_bias = USB2_BIAS_28P15MV, \ + .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, \ + }" # WWAN register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # USH register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth