Attention is currently required from: Paul Menzel, Nick Vaccaro, Zhuohao Lee, Alan Huang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58241 )
Change subject: mb/google/brya/var/baseboard/brask: Add power limits functions ......................................................................
Patch Set 16:
(2 comments)
File src/mainboard/google/brya/variants/baseboard/brask/ramstage.c:
https://review.coreboot.org/c/coreboot/+/58241/comment/b0abe7ae_91ee7c3b PS16, Line 92: if (!num_entries) : return; : : const struct device *policy_dev = DEV_PTR(dptf_policy); : if (!policy_dev) : return; : : size_t intel_idx, brask_idx; : if (!get_sku_index(limits, num_entries, &intel_idx, &brask_idx)) : return; : : config_t *conf = config_of_soc(); : struct soc_power_limits_config *soc_config = &conf->power_limits_config[intel_idx]; : : enum usb_chg_type type; : u32 watts; : u16 volts_mv, current_ma; : u32 psyspl2, pl2; : soc_config->tdp_pl4 = 0; : u32 pl2_default = DIV_ROUND_UP(limits[brask_idx].pl2_max_power, MILLIWATTS_TO_WATTS); : int rv = google_chromeec_get_usb_pd_power_info(&type, ¤t_ma, &volts_mv); suggestion, slighly reorganize this for readability:
``` struct soc_power_limits_config *soc_config; const struct device *policy_dev; size_t intel_idx, brask_idx; u16 volts_mv, current_ma; enum usb_chg_type type; u32 psyspl2, pl2; u32 pl2_default; config_t *conf; u32 watts; int rv;
if (!num_entries) return;
policy_dev = DEV_PTR(dptf_policy); if (!policy_dev) return; if (!get_sku_index(limits, num_entries, &intel_idx, &brask_idx)) return;
conf = config_of_soc(); soc_config = &conf->power_limits_config[intel_idx]; soc_config->tdp_pl4 = 0;
pl2_default = DIV_ROUND_UP(limits[brask_idx].pl2_max_power, MILLIWATTS_TO_WATTS); rv = google_chromeec_get_usb_pd_power_info(&type, ¤t_ma, &volts_mv); ```
https://review.coreboot.org/c/coreboot/+/58241/comment/e114f623_64704475 PS16, Line 131: /* voltage unit is milliVolts and current is in milliAmps */ nit: blank line after `}`