[coreboot-gerrit] Change in coreboot[master]: sb/lynxpoint: Fix 'dead increment'

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36129 )

Change subject: sb/lynxpoint: Fix 'dead increment'
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sb/lynxpoint: Fix 'dead increment'

Dead increment spotted out using clang-tools.

Change-Id: I631524b9346647048fe8ea30387553a5b4651f59
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36129
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/intel/lynxpoint/sata.c
2 files changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 4b44759..a1e0262 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -403,7 +403,7 @@
    reg32 &= ~(3 << 0);
    RCBA32(HPTC) = reg32;
    /* Read it back to stick. It's affected by posted write syndrome. */
-	reg32 = RCBA32(HPTC);
+	RCBA32(HPTC);
 }

static void enable_clock_gating(struct device *dev)
diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index aae48e7..75bfbde 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -144,7 +144,7 @@

/* Setup register 9Ch */
    	reg16 = 0;           /* Disable alternate ID */
-		reg16 = 1 << 5;      /* BWG step 12 */
+		reg16 |= (1 << 5);   /* BWG step 12 */
    	pci_write_config16(dev, 0x9c, reg16);

/* SATA Initialization register */