[coreboot-gerrit] [M] Change in coreboot[main]: nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree

[Keith Hui (Code Review)]

Attention is currently required from: Angel Pons, Keith Hui, Patrick Rudolph.

Hello Angel Pons, Patrick Rudolph, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/81881?usp=email

to look at the new patch set (#6).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree
......................................................................

nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree

Transfer all USB responsibilities to southbridge/intel/bd82x6x,
using one set of USB port configuration supplied by mainboards
in the southbridge section of their devicetree.

For MRC raminit, export southbridge_fill_pei_data() as a hook for
southbridge code to implement. With new code via this hook, bd82x6x
fills pei_data based on this one set of USB port config.

For native raminit, early_usb_init() now goes directly to the devicetree
and no longer get passed an address to it.

TEST=abuild passes for all affected boards. All USB ports still work
on asus/p8x7x-series/v/p8z77-m.

Change-Id: I38378c7ee0701abc434b030dd97873f2af63e6b0
Signed-off-by: Keith Hui 
---
M src/northbridge/intel/sandybridge/pei_data.h
M src/northbridge/intel/sandybridge/raminit_mrc.c
M src/northbridge/intel/sandybridge/romstage.c
M src/southbridge/intel/bd82x6x/early_usb.c
M src/southbridge/intel/bd82x6x/early_usb_mrc.c
M src/southbridge/intel/bd82x6x/pch.h
6 files changed, 71 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/81881/6