Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9275
-gerrit
commit d29d8f57e937ff90d3f38aacb22eab684769d489 Author: Duncan Laurie dlaurie@chromium.org Date: Mon Nov 17 13:05:50 2014 -0800
broadwell: Add USB3 PHY tuning fields to PEI DATA
These are board specific adjustments that can be made for each USB3 port.
BUG=chrome-os-partner:28234 BRANCH=samus,auron TEST=build and boot on samus
Change-Id: Iaa3ce09419dfd64e3e8187f6dc073a8c68565337 Signed-off-by: Stefan Reinauer reinauer@chromium.org Original-Commit-Id: 21000496bb4560c9d1452a128335bbf24ca1b0aa Original-Change-Id: Iab92ff7b0218d4abd9eba8a94d34ddd9a30ddb87 Original-Signed-off-by: Duncan Laurie dlaurie@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/230231 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org --- src/soc/intel/broadwell/broadwell/pei_data.h | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/broadwell/broadwell/pei_data.h b/src/soc/intel/broadwell/broadwell/pei_data.h index a805163..0acc89c 100644 --- a/src/soc/intel/broadwell/broadwell/pei_data.h +++ b/src/soc/intel/broadwell/broadwell/pei_data.h @@ -32,7 +32,7 @@ #include <types.h> #include <memory_info.h>
-#define PEI_VERSION 21 +#define PEI_VERSION 22
#define ABI_X86 __attribute__((regparm(0)))
@@ -132,6 +132,19 @@ struct pei_data struct usb2_port_setting usb2_ports[MAX_USB2_PORTS]; struct usb3_port_setting usb3_ports[MAX_USB3_PORTS];
+ /* + * USB3 board specific PHY tuning + */ + + /* Valid range: 0x69 - 0x80 */ + uint8_t usb3_txout_volt_dn_amp_adj[MAX_USB3_PORTS]; + /* Valid range: 0x80 - 0x9c */ + uint8_t usb3_txout_imp_sc_bolt_amp_adj[MAX_USB3_PORTS]; + /* Valid range: 0x39 - 0x80 */ + uint8_t usb3_txout_de_emp_adj[MAX_USB3_PORTS]; + /* Valid range: 0x3d - 0x4a */ + uint8_t usb3_txout_imp_adj_volt_amp[MAX_USB3_PORTS]; + /* Console output function */ tx_byte_func tx_byte;