Hannah Williams (hannah.williams@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17822
-gerrit
commit e9f6b1aac4e09feb0db5655bb183ee240cb05a5d Author: Hannah Williams hannah.williams@intel.com Date: Tue Nov 8 22:54:29 2016 -0800
soc/glk: Workaround to ignore WAK_STS
A0 and A1 do not set the WAK_STS bit correctly in PM1_STS
Change-Id: Ic3ace82ee60a3fc54606403ed773297e371cce57 Signed-off-by: Hannah Williams hannah.williams@intel.com --- src/soc/intel/glk/pmutil.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/soc/intel/glk/pmutil.c b/src/soc/intel/glk/pmutil.c index 2f2e24f..25cdbeb 100644 --- a/src/soc/intel/glk/pmutil.c +++ b/src/soc/intel/glk/pmutil.c @@ -343,7 +343,7 @@ int chipset_prev_sleep_state(struct chipset_power_state *ps) /* Default to S0. */ int prev_sleep_state = ACPI_S0;
- if (ps->pm1_sts & WAK_STS) { + /* WORKAROUND if (ps->pm1_sts & WAK_STS) { */ switch (acpi_sleep_from_pm1(ps->pm1_cnt)) { case ACPI_S3: if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) @@ -356,7 +356,7 @@ int chipset_prev_sleep_state(struct chipset_power_state *ps)
/* Clear SLP_TYP. */ outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_PMIO_BASE + PM1_CNT); - } + /* WORKAROUND } */ return prev_sleep_state; }
@@ -422,9 +422,10 @@ int fill_power_state(struct chipset_power_state *ps)
int vboot_platform_is_resuming(void) { +/* WORKAROUND: Ignore wake sts in A0 and A1 GLK if (!(inw(ACPI_PMIO_BASE + PM1_STS) & WAK_STS)) return 0; - + */ return acpi_sleep_from_pm1(inl(ACPI_PMIO_BASE + PM1_CNT)) == ACPI_S3; }