Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67778 )
Change subject: mb/google/skyrim: Implement touchscreen power sequencing ......................................................................
mb/google/skyrim: Implement touchscreen power sequencing
Assuming variants have a touchscreen by default, set the enable GPIO high and hold in reset during romstage, then release reset in ramstage. This will allow the touchscreen to make use of the runtime I2C detect feature (enabled in a subsequent commit) so that an ACPI device entry is created only for the touchscreen actually present.
Variants/SKUs which do not have a touchscreen (if any) can use the romstage/ramstage GPIO override tables to set the associated enable/ reset GPIOs to NC.
BUG=b:121309055 TEST=build/boot skyrim with rest of patch series
Change-Id: Ic4d7ac8f951bb94da2216a24dc85a96275c9d449 Signed-off-by: Matt DeVillier matt.devillier@amd.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/67778 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martin.roth@amd.corp-partner.google.com Reviewed-by: Raul Rangel rrangel@chromium.org --- M src/mainboard/google/skyrim/variants/baseboard/gpio.c 1 file changed, 35 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved Martin Roth: Looks good to me, approved
diff --git a/src/mainboard/google/skyrim/variants/baseboard/gpio.c b/src/mainboard/google/skyrim/variants/baseboard/gpio.c index 6062d93..2e265d1 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/gpio.c +++ b/src/mainboard/google/skyrim/variants/baseboard/gpio.c @@ -113,10 +113,11 @@ PAD_NF(GPIO_116, CLK_REQ2_L, PULL_NONE), /* SOC_FPMCU_BOOT0 */ PAD_GPO(GPIO_130, LOW), + /* Enable touchscreen, release from reset */ /* EN_PP3300_TCHSCR */ - PAD_GPO(GPIO_131, LOW), + PAD_GPO(GPIO_131, HIGH), /* TCHSCR_RESET_L */ - PAD_GPO(GPIO_136, LOW), + PAD_GPO(GPIO_136, HIGH), /* SOC_BIOS_WP_L */ PAD_GPI(GPIO_138, PULL_NONE), /* EN_SPKR */ @@ -200,6 +201,11 @@ PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH), /* SSD_AUX_RESET_L */ PAD_GPO(GPIO_6, HIGH), + /* Enable touchscreen, hold in reset */ + /* EN_PP3300_TCHSCR */ + PAD_GPO(GPIO_131, HIGH), + /* TCHSCR_RESET_L */ + PAD_GPO(GPIO_136, LOW), };
void baseboard_romstage_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)