Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48221 )
Change subject: cpu/x86/lapic/secondary.S: Adapt for x86_64 ......................................................................
cpu/x86/lapic/secondary.S: Adapt for x86_64
Adapt the old lapic init code for x86_64.
Change-Id: I5128ed574323025e927137870fb10b23d06bc01d Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/x86/lapic/secondary.S 1 file changed, 12 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/48221/1
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S index 8a44112..c5784cc 100644 --- a/src/cpu/x86/lapic/secondary.S +++ b/src/cpu/x86/lapic/secondary.S @@ -33,7 +33,11 @@ _secondary_gdt_addr: gdtaddr: .word 0 /* the table limit */ +#ifdef __x86_64__ + .quad 0 +#else .long 0 /* we know the offset */ +#endif
_secondary_start_end:
@@ -54,14 +58,22 @@ /* Load the Interrupt descriptor table */ lidt idtarg
+#ifdef __x86_64__ + /* entry64.inc preserves ebx. */ + #include <cpu/x86/64bit/entry64.inc> + mov secondary_stack, %rsp + mov secondary_cpu_index, %rdi +#else /* Set the stack pointer, and flag that we are done */ xorl %eax, %eax movl secondary_stack, %esp + andl $0xfffffff0, %esp sub $12, %esp /* maintain 16-byte alignment for the call below */ movl secondary_cpu_index, %edi pushl %edi movl %eax, secondary_stack +#endif
call secondary_cpu_init 1: hlt