Attention is currently required from: Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56867 )
Change subject: soc/intel/tgl: Allow setting PCIe subsystem IDs after FSP-S ......................................................................
Patch Set 3:
(2 comments)
File src/soc/intel/tigerlake/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125939): https://review.coreboot.org/c/coreboot/+/56867/comment/b080610f_6fd44d76 PS3, Line 640: uint64_t :4; space prohibited before that ':' (ctx:WxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-125939): https://review.coreboot.org/c/coreboot/+/56867/comment/3a00b51c_703e5e97 PS3, Line 642: uint64_t :16; space prohibited before that ':' (ctx:WxV)