Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43528 )
Change subject: mb/google/volteer: Update DPTF with temp sensor 3 ......................................................................
mb/google/volteer: Update DPTF with temp sensor 3
While the DPTF refactor was in progress, TSR3 was added to volteer's dptf.asl file, and I forgot to update the devicetree with TSR3 as well. This patch fixes that.
BUG=b:149722146 TEST=boot volteer, dump SSDT & DSDT, verify TSR3._STA returns 0xF
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: I71bc798492ec45bb1e2f8d779e6829db52ef4499 --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/43528/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index f0bb25b..b8f6f24 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -311,18 +311,26 @@ TEMP_PCT(45, 56), TEMP_PCT(42, 46), TEMP_PCT(39, 36),}}" + register "policies.active[4]" = "{.target=DPTF_TEMP_SENSOR_3, + .thresholds={TEMP_PCT(50, 90), + TEMP_PCT(47, 69), + TEMP_PCT(45, 56), + TEMP_PCT(42, 46), + TEMP_PCT(39, 36),}}"
## Passive Policy register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 6000)" register "policies.passive[2]" = "DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 65, 6000)" register "policies.passive[3]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 65, 6000)" + register "policies.passive[4]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 65, 6000)"
## Critical Policy register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 105, SHUTDOWN)" register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 75, SHUTDOWN)" register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 75, SHUTDOWN)" register "policies.critical[3]" = "DPTF_CRITICAL(TEMP_SENSOR_2, 75, SHUTDOWN)" + register "policies.critical[4]" = "DPTF_CRITICAL(TEMP_SENSOR_3, 75, SHUTDOWN)"
## Power Limits Control # 10-15W PL1 in 200mW increments, avg over 28-32s interval