[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43657 )

Change subject: soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform
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Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43657/3/src/soc/intel/tigerlake/rom... 
File src/soc/intel/tigerlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/43657/3/src/soc/intel/tigerlake/rom... 
PS3, Line 199: 0x1
I know this isn't added in this change, but shouldn't VtdItbtEnable be set based on whether mainboard has TBT enabled? Same for the the base addresses below i.e. pass in address only for the devices that are really enabled by mainboard?