[coreboot-gerrit] [M] Change in coreboot[master]: soc/intel/: Store CSE firmware version into CBMEM

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74384 )

Change subject: soc/intel/: Store CSE firmware version into CBMEM
......................................................................

soc/intel/: Store CSE firmware version into CBMEM

The patch implements an API that stores the CSE firmware version in the
CBMEM table. The API will be called from RAMSTAGE based on boot state
machine depending upon CSE sync config options
(`SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE` or
`SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE`).

BUG=b:273661726
TEST=Able to build and boot google/marasov.

Signed-off-by: Dinesh Gehlot 
Change-Id: I923049d2f1f589f87e1a29e1ac94af7f5fccc2c8

Signed-off-by: Subrata Banik 
Change-Id: I93e1fc60ae30fb330b48cbaeb6da32d727e7c009
---
M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
M src/soc/intel/common/block/cse/cse_lite.c
M src/soc/intel/common/block/include/intelblocks/cse.h
3 files changed, 90 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/74384/1

diff --git a/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h b/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
index fa5c8d9..4162d84 100644
--- a/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
+++ b/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h
@@ -85,6 +85,7 @@
 #define CBMEM_ID_MEM_CHIP_INFO	0x5048434D
 #define CBMEM_ID_AMD_STB	0x5f425453
 #define CBMEM_ID_AMD_MP2	0x5f32504d
+#define CBMEM_ID_CSE_PARTITION_VERSION 0x43535056

#define CBMEM_ID_TO_NAME_TABLE				 \
    { CBMEM_ID_ACPI,		"ACPI       " }, \
@@ -163,5 +164,6 @@
    { CBMEM_ID_TYPE_C_INFO,		"TYPE_C INFO"},\
    { CBMEM_ID_MEM_CHIP_INFO,       "MEM CHIP INFO"},\
    { CBMEM_ID_AMD_STB,		"AMD STB"},\
-	{ CBMEM_ID_AMD_MP2,		"AMD MP2 BUFFER"}
+	{ CBMEM_ID_AMD_MP2,		"AMD MP2 BUFFER"},\
+	{ CBMEM_ID_CSE_PARTITION_VERSION, "CSE PARTITION VERSION"}
 #endif /* _CBMEM_ID_H_ */
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index 4cc9e19..87a78ca 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -1152,6 +1152,41 @@
    }
 }

+static enum cb_err cse_copy_fw_version(struct fw_version *dst, const struct fw_version *src)
+{
+	if (src == NULL || dst == NULL) {
+		printk(BIOS_WARNING, "CSE: NULL value pointer provided for fw version copy.\n");
+		return CB_ERR_ARG;
+	}
+
+	dst->major = src->major;
+	dst->minor = src->minor;
+	dst->hotfix = src->hotfix;
+	dst->build = src->build;
+
+	return CB_SUCCESS;
+}
+
+/*
+ * Helper function that stores current CSE firmware version to CBMEM memory,
+ * except during recovery mode.
+ */
+static void store_cse_rw_fw_version(void)
+{
+	if (vboot_recovery_mode_enabled())
+		return;
+
+	struct get_bp_info_rsp cse_bp_info;
+
+	if (cse_get_bp_info(&cse_bp_info) != CB_SUCCESS)
+		return;
+
+	const struct cse_bp_entry *cse_bp = cse_get_bp_entry(RW, &cse_bp_info.bp_info);
+	struct cse_fw_partition_info *version;
+	version = cbmem_add(CBMEM_ID_CSE_PARTITION_VERSION, sizeof(*version));
+	cse_copy_fw_version(&(version->cur_cse_fw_version), &(cse_bp->fw_ver));
+}
+
 static enum cb_err send_get_fpt_partition_info_cmd(enum fpt_partition_id id,
    struct fw_version_resp *resp)
 {
@@ -1218,7 +1253,25 @@
    	timestamp_add_now(TS_CSE_FW_SYNC_START);
    	cse_fw_sync();
    	timestamp_add_now(TS_CSE_FW_SYNC_END);
+
+		if (CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION))
+			store_cse_rw_fw_version();
    }
 }

+static void ramstage_store_cse_fpt_info(void *unused)
+{
+	bool s3wake;
+	s3wake = acpi_get_sleep_type() == ACPI_S3;
+
+	if (s3wake)
+		return;
+
+	/* Store the CSE RW Firmware Version into CBMEM */
+	if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE)
+		&& CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION))
+		store_cse_rw_fw_version();
+}
+
+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, ramstage_store_cse_fpt_info, NULL);
 BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_EXIT, ramstage_cse_fw_sync, NULL);
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index 6b708ca..47f86ea 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -144,6 +144,18 @@
    struct flash_partition_data manifest_data;
 };

+/* ISHC version */
+struct cse_fw_ish_version_info {
+	struct fw_version prev_cse_fw_version;
+	struct fw_version cur_ish_fw_version;
+};
+
+/* CSE and ISHC version */
+struct cse_fw_partition_info {
+	struct fw_version cur_cse_fw_version;
+	struct cse_fw_ish_version_info ish_partition_info;
+};
+
 /* CSE RX and TX error status */
 enum cse_tx_rx_status {
    /*